arm64: dts: imx91-11x11-evk: Add audio XCVR sound card support

Add audio XCVR sound card, which supports SPDIF TX & RX only,
eARC RX, ARC RX are not supported.

Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts
index b0a295993dbae4fe69b8a0468fd92ce6811f832a..03f460d62f7a5887731eea07cdbbb3a29a39f893 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts
@@ -131,6 +131,19 @@
                        };
                };
        };
+
+       sound-xcvr {
+               compatible = "fsl,imx-audio-card";
+               model = "imx-audio-xcvr";
+
+               pri-dai-link {
+                       link-name = "XCVR PCM";
+
+                       cpu {
+                               sound-dai = <&xcvr>;
+                       };
+               };
+       };
 };
 
 &adc1 {
@@ -523,6 +536,18 @@
        status = "okay";
 };
 
+&xcvr {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&pinctrl_spdif>;
+       pinctrl-1 = <&pinctrl_spdif_sleep>;
+       assigned-clocks = <&clk IMX93_CLK_SPDIF>,
+                         <&clk IMX93_CLK_AUDIO_XCVR>;
+       assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>,
+                                <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
+       assigned-clock-rates = <12288000>, <200000000>;
+       status = "okay";
+};
+
 &iomuxc {
        pinctrl_eqos: eqosgrp {
                fsl,pins = <
@@ -668,6 +693,20 @@
                >;
        };
 
+       pinctrl_spdif: spdifgrp {
+               fsl,pins = <
+                       MX91_PAD_GPIO_IO22__SPDIF_IN                    0x31e
+                       MX91_PAD_GPIO_IO23__SPDIF_OUT                   0x31e
+               >;
+       };
+
+       pinctrl_spdif_sleep: spdifsleepgrp {
+               fsl,pins = <
+                       MX91_PAD_GPIO_IO22__GPIO2_IO22                  0x51e
+                       MX91_PAD_GPIO_IO23__GPIO2_IO23                  0x51e
+               >;
+       };
+
        pinctrl_lpi2c3: lpi2c3grp {
                fsl,pins = <
                        MX91_PAD_GPIO_IO28__LPI2C3_SDA                          0x40000b9e