]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
dt-bindings: hwmon: convert npcm750-pwm-fan to DT schema
authorTomer Maimon <tmaimon77@gmail.com>
Sun, 15 Feb 2026 16:35:53 +0000 (18:35 +0200)
committerGuenter Roeck <linux@roeck-us.net>
Tue, 31 Mar 2026 02:45:05 +0000 (19:45 -0700)
Convert the Nuvoton HWMON PWM and FAN controllers binding to schema
format.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20260215163553.1334475-1-tmaimon77@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt [deleted file]
Documentation/devicetree/bindings/hwmon/nuvoton,npcm750-pwm-fan.yaml [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt
deleted file mode 100644 (file)
index 18095ba..0000000
+++ /dev/null
@@ -1,88 +0,0 @@
-Nuvoton NPCM PWM and Fan Tacho controller device
-
-The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
-controller outputs and 16 Fan tachometer controller inputs.
-
-The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
-controller outputs and 16 Fan tachometer controller inputs.
-
-Required properties for pwm-fan node
-- #address-cells : should be 1.
-- #size-cells  : should be 0.
-- compatible   : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
-                               : "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX.
-- reg                  : specifies physical base address and size of the registers.
-- reg-names    : must contain:
-                                       * "pwm" for the PWM registers.
-                                       * "fan" for the Fan registers.
-- clocks               : phandle of reference clocks.
-- clock-names  : must contain
-                                       * "pwm" for PWM controller operating clock.
-                                       * "fan" for Fan controller operating clock.
-- interrupts   : contain the Fan interrupts with flags for falling edge.
-- pinctrl-names        : a pinctrl state named "default" must be defined.
-- pinctrl-0    : phandle referencing pin configuration of the PWM and Fan
-                                       controller ports.
-
-fan subnode format:
-===================
-Under fan subnode can be upto 8 child nodes, each child node representing a fan.
-Each fan subnode must have one PWM channel and at least one Fan tach channel.
-
-For PWM channel can be configured cooling-levels to create cooling device.
-Cooling device could be bound to a thermal zone for the thermal control.
-
-Required properties for each child node:
-- reg : specify the PWM output channel.
-       integer value in the range 0 through 7, that represent
-       the PWM channel number that used.
-
-- fan-tach-ch : specify the Fan tach input channel.
-               integer value in the range 0 through 15, that represent
-               the fan tach channel number that used.
-
-               At least one Fan tach input channel is required
-
-Optional property for each child node:
-- cooling-levels: PWM duty cycle values in a range from 0 to 255
-                  which correspond to thermal cooling states.
-
-Examples:
-
-pwm_fan:pwm-fan-controller@103000 {
-       #address-cells = <1>;
-       #size-cells = <0>;
-       compatible = "nuvoton,npcm750-pwm-fan";
-       reg = <0x103000 0x2000>,
-               <0x180000 0x8000>;
-       reg-names = "pwm", "fan";
-       clocks = <&clk NPCM7XX_CLK_APB3>,
-               <&clk NPCM7XX_CLK_APB4>;
-       clock-names = "pwm","fan";
-       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
-                       <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
-                       <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
-                       <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
-                       <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
-                       <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
-                       <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
-                       <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
-                       &fanin0_pins &fanin1_pins &fanin2_pins
-                       &fanin3_pins &fanin4_pins>;
-       fan@0 {
-               reg = <0x00>;
-               fan-tach-ch = /bits/ 8 <0x00 0x01>;
-               cooling-levels = <127 255>;
-       };
-       fan@1 {
-               reg = <0x01>;
-               fan-tach-ch = /bits/ 8 <0x02 0x03>;
-       };
-       fan@2 {
-               reg = <0x02>;
-               fan-tach-ch = /bits/ 8 <0x04>;
-       };
-
-};
diff --git a/Documentation/devicetree/bindings/hwmon/nuvoton,npcm750-pwm-fan.yaml b/Documentation/devicetree/bindings/hwmon/nuvoton,npcm750-pwm-fan.yaml
new file mode 100644 (file)
index 0000000..73464af
--- /dev/null
@@ -0,0 +1,139 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/hwmon/nuvoton,npcm750-pwm-fan.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton NPCM7xx/NPCM8xx PWM and Fan Tach Controller
+
+maintainers:
+  - Tomer Maimon <tmaimon77@gmail.com>
+
+description:
+  The NPCM7xx/NPCM8xx family includes a PWM and Fan Tachometer controller.
+  The controller provides up to 8 (NPCM7xx) or 12 (NPCM8xx) PWM channels and up
+  to 16 tachometer inputs. It is used for fan speed control and monitoring.
+
+properties:
+  compatible:
+    enum:
+      - nuvoton,npcm750-pwm-fan
+      - nuvoton,npcm845-pwm-fan
+
+  reg:
+    maxItems: 2
+    description: Register addresses for PWM and Fan Tach units.
+
+  reg-names:
+    items:
+      - const: pwm
+      - const: fan
+
+  clocks:
+    maxItems: 2
+    description: Clocks for the PWM and Fan Tach modules.
+
+  clock-names:
+    items:
+      - const: pwm
+      - const: fan
+
+  interrupts:
+    description:
+      Contains the Fan interrupts with flags for falling edge.
+      For NPCM7XX, 8 interrupt lines are expected (one per PWM channel).
+      For NPCM8XX, 12 interrupt lines are expected (one per PWM channel).
+
+    minItems: 8
+    maxItems: 12
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+patternProperties:
+  "^fan@[0-9a-f]+$":
+    type: object
+    $ref: fan-common.yaml#
+    unevaluatedProperties: false
+
+    properties:
+      reg:
+        description:
+          Specify the PWM output channel. Integer value in the range 0-7 for
+          NPCM7XX or 0-11 for NPCM8XX, representing the PWM channel number.
+
+        maximum: 11
+
+      fan-tach-ch:
+        $ref: /schemas/types.yaml#/definitions/uint8-array
+        description:
+          The tach channel(s) used for the fan.
+          Integer values in the range 0-15.
+
+        items:
+          maximum: 15
+
+      cooling-levels:
+        description:
+          PWM duty cycle values in a range from 0 to 255 which
+          correspond to thermal cooling states. This property enables
+          thermal zone integration for automatic fan speed control
+          based on temperature.
+
+        items:
+          maximum: 255
+
+    required:
+      - reg
+      - fan-tach-ch
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - clocks
+  - clock-names
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    pwm_fan: pwm-fan@103000 {
+        compatible = "nuvoton,npcm750-pwm-fan";
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        reg = <0x103000 0x2000>, <0x180000 0x8000>;
+        reg-names = "pwm", "fan";
+
+        clocks = <&clk NPCM7XX_CLK_APB3>, <&clk NPCM7XX_CLK_APB4>;
+        clock-names = "pwm", "fan";
+
+        interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&pwm0_pins &fanin0_pins>;
+
+        fan@0 {
+            reg = <0>;
+            fan-tach-ch = <0 1>;
+            cooling-levels = <64 128 192 255>;
+        };
+
+        fan@1 {
+            reg = <1>;
+            fan-tach-ch = <2>;
+        };
+    };