]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/arm/aspeed: Attach SRAM device to AST1700 model
authorKane Chen <kane_chen@aspeedtech.com>
Wed, 4 Feb 2026 08:21:26 +0000 (08:21 +0000)
committerCédric Le Goater <clg@redhat.com>
Wed, 4 Feb 2026 09:10:57 +0000 (10:10 +0100)
Map the SRAM device to AST1700 model

Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Link: https://lore.kernel.org/qemu-devel/20260204082113.3955407-10-kane_chen@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
hw/arm/aspeed_ast1700.c
hw/arm/aspeed_ast27x0.c
include/hw/arm/aspeed_ast1700.h

index f610f259326c4e22f1be0b00e45db21b38575278..fd5db3268e753cde0561520dcfbda647e46ac8db 100644 (file)
 #include "hw/arm/aspeed_ast1700.h"
 
 #define AST2700_SOC_LTPI_SIZE        0x01000000
+#define AST1700_SOC_SRAM_SIZE        0x00040000
 
 enum {
+    ASPEED_AST1700_DEV_SRAM,
     ASPEED_AST1700_DEV_UART12,
     ASPEED_AST1700_DEV_LTPI_CTRL,
 };
 
 static const hwaddr aspeed_ast1700_io_memmap[] = {
+    [ASPEED_AST1700_DEV_SRAM]      =  0x00BC0000,
     [ASPEED_AST1700_DEV_UART12]    =  0x00C33B00,
     [ASPEED_AST1700_DEV_LTPI_CTRL] =  0x00C34000,
 };
@@ -28,12 +31,21 @@ static void aspeed_ast1700_realize(DeviceState *dev, Error **errp)
 {
     AspeedAST1700SoCState *s = ASPEED_AST1700(dev);
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+    char dev_name[32];
 
     /* Occupy memory space for all controllers in AST1700 */
     memory_region_init(&s->iomem, OBJECT(s), TYPE_ASPEED_AST1700,
                        AST2700_SOC_LTPI_SIZE);
     sysbus_init_mmio(sbd, &s->iomem);
 
+    /* SRAM */
+    snprintf(dev_name, sizeof(dev_name), "aspeed.ioexp-sram.%d", s->board_idx);
+    memory_region_init_ram(&s->sram, OBJECT(s), dev_name,
+                           AST1700_SOC_SRAM_SIZE, errp);
+    memory_region_add_subregion(&s->iomem,
+                            aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_SRAM],
+                            &s->sram);
+
     /* UART */
     qdev_prop_set_uint8(DEVICE(&s->uart), "regshift", 2);
     qdev_prop_set_uint32(DEVICE(&s->uart), "baudbase", 38400);
@@ -69,11 +81,16 @@ static void aspeed_ast1700_instance_init(Object *obj)
     return;
 }
 
+static const Property aspeed_ast1700_props[] = {
+    DEFINE_PROP_UINT8("board-idx", AspeedAST1700SoCState, board_idx, 0),
+};
+
 static void aspeed_ast1700_class_init(ObjectClass *klass, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
 
     dc->realize = aspeed_ast1700_realize;
+    device_class_set_props(dc, aspeed_ast1700_props);
 }
 
 static const TypeInfo aspeed_ast1700_info = {
index d9866c2c3b232cf193b8d2c42ced8b6ccfb22a0c..6a144742ead65753d12d617d477d93ae134b957a 100644 (file)
@@ -1023,6 +1023,7 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
 
     /* IO Expander */
     for (i = 0; i < sc->ioexp_num; i++) {
+        qdev_prop_set_uint8(DEVICE(&s->ioexp[i]), "board-idx", i);
         if (!sysbus_realize(SYS_BUS_DEVICE(&s->ioexp[i]), errp)) {
             return;
         }
index b15b13aedd3f3265a036716228e5c7dcf192e901..a981bff3b2680422fed59159ce9143c78188143a 100644 (file)
@@ -20,9 +20,11 @@ struct AspeedAST1700SoCState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
+    uint8_t board_idx;
 
     AspeedLTPIState ltpi;
     SerialMM uart;
+    MemoryRegion sram;
 };
 
 #endif /* ASPEED_AST1700_H */