+2018-09-27 Michael Meissner <meissner@linux.ibm.com>
+
+ Backport from mainline
+ 2018-08-20 Michael Meissner <meissner@linux.ibm.com>
+
+ PR target/87033
+ * config/rs6000/rs6000.md (extendsi<mode>2): Change constraints
+ from 'Y' to 'YZ' to enable the LWAX instruction to be generated
+ for indexed loads.
+
2018-09-21 Eric Botcazou <ebotcazou@adacore.com>
* config/rs6000/rs6000.c (rs6000_function_ok_for_sibcall): Return false
(define_insn "extendsi<mode>2"
[(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r,r,wl,wu,wj,wK,wH")
- (sign_extend:EXTSI (match_operand:SI 1 "lwa_operand" "Y,r,Z,Z,r,wK,wH")))]
+ (sign_extend:EXTSI (match_operand:SI 1 "lwa_operand" "YZ,r,Z,Z,r,wK,wH")))]
""
"@
lwa%U1%X1 %0,%1
+2018-09-27 Michael Meissner <meissner@linux.ibm.com>
+
+ Backport from mainline
+ 2018-08-20 Michael Meissner <meissner@linux.ibm.com>
+
+ PR target/87033
+ * gcc.target/powerpc/pr87033.c: New test.
+
2018-09-21 Eric Botcazou <ebotcazou@adacore.com>
* gcc.dg/nested-func-11.c: New test.
--- /dev/null
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-options "-O2" } */
+
+/* Insure that a LWAX is generated instead of ADD + LWA. LP64 is needed
+ because the LWA and LWAX instructions are only available in 64-bit mode. */
+long func (int *p, unsigned long n)
+{
+ return p[n];
+}
+
+/* { dg-final { scan-assembler {\mlwax\M} } } */
+/* { dg-final { scan-assembler-not {\mlwa\M} } } */