AMD/Xilinx/FPGA changes for v2025.10-rc1 v2
zynqmp:
- Generate fit-dtb.blob all the time
- Simplify power-domain driver bind
zynqmp_mini:
- Remove PSCI_RESET
fpga:
- Improve user feedback in case of FPGA bitstream load failure
misc:
- Fix kernel-doc in gpio zynq and axi_mrmac
spi:
- Revert fix in STIG mode
[trini: Remove CONFIG_FPGA_VERSALPL=y from sandbox due to
sandbox+clang+asan test problem]
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_ARM_FFA_TRANSPORT=y
-CONFIG_FPGA_VERSALPL=y
+ CONFIG_FPGA_ALTERA=y
+ CONFIG_FPGA_STRATIX_II=y
+ CONFIG_FPGA_STRATIX_V=y
+ CONFIG_FPGA_ACEX1K=y
+ CONFIG_FPGA_CYCLON2=y
+ CONFIG_FPGA_LATTICE=y
+ CONFIG_FPGA_XILINX=y
+ CONFIG_FPGA_SPARTAN2=y
+ CONFIG_FPGA_SPARTAN3=y
+ CONFIG_FPGA_VIRTEX2=y
+ CONFIG_SYS_FPGA_CHECK_BUSY=y
+ CONFIG_SYS_FPGA_CHECK_CTRLC=y
+ CONFIG_DM_FPGA=y
+ CONFIG_SANDBOX_FPGA=y
CONFIG_GPIO_HOG=y
CONFIG_DM_GPIO_LOOKUP_LABEL=y
CONFIG_QCOM_PMIC_GPIO=y