re PR target/46098 (ICE: in extract_insn, at recog.c:2100 with -msse3 -ffloat-store...

	PR target/46098
	* config/i386/i386.c (ix86_expand_special_args_builtin): Always
	generate target register for "load" class builtins.

	Revert:
	2010-10-22  Uros Bizjak  <ubizjak@gmail.com>

	PR target/46098
	* config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
	Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
	(avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
	(*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
	(<sse>_movu<ssemodesuffix>): New expander.
	(*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
	(avx_movdqu<avxmodesuffix>): New expander.
	(*sse2_movdqu): Rename from sse2_movdqu.
	(sse2_movdqu): New expander.

From-SVN: r187484

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a66c193f3041c5ae495e4b48e949aca8910a51e7..fd017251a375e0d1cd0a129b8802986367410bc4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,23 @@
+2012-05-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/i386.c (ix86_expand_special_args_builtin): Always
+       generate target register for "load" class builtins.
+
+       Revert:
+       2010-10-22  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/46098
+       * config/i386/sse.md (*avx_movu<ssemodesuffix><avxmodesuffix>):
+       Rename from avx_movu<ssemodesuffix><avxmodesuffix>.
+       (avx_movu<ssemodesuffix><avxmodesuffix>): New expander.
+       (*<sse>_movu<ssemodesuffix>): Rename from <sse>_movu<ssemodesuffix>.
+       (<sse>_movu<ssemodesuffix>): New expander.
+       (*avx_movdqu<avxmodesuffix>): Rename from avx_movdqu<avxmodesuffix>.
+       (avx_movdqu<avxmodesuffix>): New expander.
+       (*sse2_movdqu): Rename from sse2_movdqu.
+       (sse2_movdqu): New expander.
+
 2012-05-13  Uros Bizjak  <ubizjak@gmail.com>
 
        Backport from mainline

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 2e7d878e50809a2cfb3a4347d5826e251bf683df..0322d7af1735b758fe6b6c6c2fbef01b0c76c83e 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -24060,8 +24060,8 @@ ix86_expand_special_args_builtin (const struct builtin_description *d,
       arg_adjust = 0;
       if (optimize
          || target == 0
-         || GET_MODE (target) != tmode
-         || ! (*insn_p->operand[0].predicate) (target, tmode))
+         || !register_operand (target, tmode)
+         || GET_MODE (target) != tmode)
        target = gen_reg_rtx (tmode);
     }
 

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 41f03a32254b50885f68c232ae246c79c9fba274..881aa6bc9afda7766d959619a6167acaaaeee569 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -354,18 +354,7 @@
   DONE;
 })
 
-(define_expand "avx_movup<avxmodesuffixf2c><avxmodesuffix>"
-  [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "")
-       (unspec:AVXMODEF2P
-         [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "")]
-         UNSPEC_MOVU))]
-  "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*avx_movup<avxmodesuffixf2c><avxmodesuffix>"
+(define_insn "avx_movup<avxmodesuffixf2c><avxmodesuffix>"
   [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "=x,m")
        (unspec:AVXMODEF2P
          [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "xm,x")]
@@ -391,18 +380,7 @@
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "TI")])
 
-(define_expand "<sse>_movup<ssemodesuffixf2c>"
-  [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "")
-       (unspec:SSEMODEF2P
-         [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "")]
-         UNSPEC_MOVU))]
-  "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*<sse>_movup<ssemodesuffixf2c>"
+(define_insn "<sse>_movup<ssemodesuffixf2c>"
   [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m")
        (unspec:SSEMODEF2P
          [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm,x")]
@@ -414,18 +392,7 @@
    (set_attr "movu" "1")
    (set_attr "mode" "<MODE>")])
 
-(define_expand "avx_movdqu<avxmodesuffix>"
-  [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "")
-       (unspec:AVXMODEQI
-         [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "")]
-         UNSPEC_MOVU))]
-  "TARGET_AVX"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (<MODE>mode, operands[1]);
-})
-
-(define_insn "*avx_movdqu<avxmodesuffix>"
+(define_insn "avx_movdqu<avxmodesuffix>"
   [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "=x,m")
        (unspec:AVXMODEQI
          [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")]
@@ -437,17 +404,7 @@
    (set_attr "prefix" "vex")
    (set_attr "mode" "<avxvecmode>")])
 
-(define_expand "sse2_movdqu"
-  [(set (match_operand:V16QI 0 "nonimmediate_operand" "")
-       (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "")]
-                     UNSPEC_MOVU))]
-  "TARGET_SSE2"
-{
-  if (MEM_P (operands[0]) && MEM_P (operands[1]))
-    operands[1] = force_reg (V16QImode, operands[1]);
-})
-
-(define_insn "*sse2_movdqu"
+(define_insn "sse2_movdqu"
   [(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
        (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "xm,x")]
                      UNSPEC_MOVU))]