PCIDIRECT_CONFIG_ADDRESS );
}
+PROVIDE_PCIAPI_INLINE ( direct, pci_can_probe );
PROVIDE_PCIAPI_INLINE ( direct, pci_discover );
PROVIDE_PCIAPI_INLINE ( direct, pci_read_config_byte );
PROVIDE_PCIAPI_INLINE ( direct, pci_read_config_word );
extern int pcibios_write ( struct pci_device *pci, uint32_t command,
uint32_t value );
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok Bus probing is allowed
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( pcbios, pci_can_probe ) ( void ) {
+ return 1;
+}
+
/**
* Read byte from PCI configuration space via PCI BIOS
*
#define PCIAPI_PREFIX_cloud __cloud_
#endif
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok Bus probing is allowed
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( cloud, pci_can_probe ) ( void ) {
+ return 1;
+}
+
#endif /* _IPXE_PCICLOUD_H */
extern void pcidirect_prepare ( struct pci_device *pci, int where );
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok Bus probing is allowed
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( direct, pci_can_probe ) ( void ) {
+ return 1;
+}
+
/**
* Find next PCI bus:dev.fn address range in system
*
return ( status >> 8 );
}
+PROVIDE_PCIAPI_INLINE ( pcbios, pci_can_probe );
PROVIDE_PCIAPI ( pcbios, pci_discover, pcibios_discover );
PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_byte );
PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_word );
return pcicloud->pci_ioremap ( pci, bus_addr, len );
}
+PROVIDE_PCIAPI_INLINE ( cloud, pci_can_probe );
PROVIDE_PCIAPI ( cloud, pci_discover, pcicloud_discover );
PROVIDE_PCIAPI ( cloud, pci_read_config_byte, pcicloud_read_config_byte );
PROVIDE_PCIAPI ( cloud, pci_read_config_word, pcicloud_read_config_word );
return 0;
}
+PROVIDE_PCIAPI_INLINE ( ecam, pci_can_probe );
PROVIDE_PCIAPI ( ecam, pci_discover, ecam_discover );
PROVIDE_PCIAPI_INLINE ( ecam, pci_read_config_byte );
PROVIDE_PCIAPI_INLINE ( ecam, pci_read_config_word );
uint32_t busdevfn = 0;
int rc;
+ /* Skip automatic probing if prohibited */
+ if ( ! pci_can_probe() )
+ return 0;
+
do {
/* Allocate struct pci_device */
if ( ! pci )
int rc;
};
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok Bus probing is allowed
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( ecam, pci_can_probe ) ( void ) {
+ return 1;
+}
+
extern struct pci_api ecam_api;
#endif /* _IPXE_ECAM_H */
extern int efipci_write ( struct pci_device *pci, unsigned long location,
unsigned long value );
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok Bus probing is allowed
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( efi, pci_can_probe ) ( void ) {
+ return 0;
+}
+
/**
* Find next PCI bus:dev.fn address range in system
*
extern int linux_pci_write ( struct pci_device *pci, unsigned long where,
unsigned long value, size_t len );
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok Bus probing is allowed
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( linux, pci_can_probe ) ( void ) {
+ return 1;
+}
+
/**
* Find next PCI bus:dev.fn address range in system
*
/* Include all architecture-dependent I/O API headers */
#include <bits/pci_io.h>
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok Bus probing is allowed
+ */
+int pci_can_probe ( void );
+
/**
* Find next PCI bus:dev.fn address range in system
*
return ioremap ( bus_addr, len );
}
+PROVIDE_PCIAPI_INLINE ( efi, pci_can_probe );
PROVIDE_PCIAPI_INLINE ( efi, pci_discover );
PROVIDE_PCIAPI_INLINE ( efi, pci_read_config_byte );
PROVIDE_PCIAPI_INLINE ( efi, pci_read_config_word );
return rc;
}
+PROVIDE_PCIAPI_INLINE ( linux, pci_can_probe );
PROVIDE_PCIAPI_INLINE ( linux, pci_discover );
PROVIDE_PCIAPI_INLINE ( linux, pci_read_config_byte );
PROVIDE_PCIAPI_INLINE ( linux, pci_read_config_word );