]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: msm8917: Use the header with DSI phy clock IDs
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 8 Apr 2025 09:32:01 +0000 (11:32 +0200)
committerBjorn Andersson <andersson@kernel.org>
Tue, 8 Apr 2025 21:56:15 +0000 (16:56 -0500)
Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-4-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/msm8917.dtsi

index 9d8358745c91c53dc19a07dbb1a326daef92e235..8a642fce2e40d6d252a1cfbdfed602e6789ef09a 100644 (file)
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-msm8917.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
                        #power-domain-cells = <1>;
                        clocks = <&xo_board>,
                                 <&sleep_clk>,
-                                <&mdss_dsi0_phy 1>,
-                                <&mdss_dsi0_phy 0>;
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>;
                        clock-names = "xo",
                                      "sleep_clk",
                                      "dsi0pll",
 
                                assigned-clocks = <&gcc BYTE0_CLK_SRC>,
                                                  <&gcc PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>,
-                                                        <&mdss_dsi0_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                clocks = <&gcc GCC_MDSS_MDP_CLK>,
                                         <&gcc GCC_MDSS_AHB_CLK>,