arm64: dts: s32g: add SAR ADC support for s32g2 and s32g3

Add ADC0 and ADC1 for S32G2 and S32G3 SoCs.

Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
Reviewed-by: Enric Balletbo i Serra <eballetb@redhat.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index f508b776b4ddd6d74d96d00132d957bf44c1f122..a1f33197b4b0108b1402402537addc4852e388cb 100644 (file)
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -563,6 +563,16 @@
                        status = "disabled";
                };
 
+               adc0: adc@401f8000 {
+                       compatible = "nxp,s32g2-sar-adc";
+                       reg = <0x401f8000 0x1000>;
+                       interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 0x41>;
+                       dmas = <&edma0 0 32>;
+                       dma-names = "rx";
+                       status = "disabled";
+               };
+
                swt4: watchdog@40200000 {
                        compatible = "nxp,s32g2-swt";
                        reg = <0x40200000 0x1000>;
@@ -735,6 +745,16 @@
                        status = "disabled";
                };
 
+               adc1: adc@402e8000 {
+                       compatible = "nxp,s32g2-sar-adc";
+                       reg = <0x402e8000 0x1000>;
+                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 0x41>;
+                       dmas = <&edma1 1 32>;
+                       dma-names = "rx";
+                       status = "disabled";
+               };
+
                usdhc0: mmc@402f0000 {
                        compatible = "nxp,s32g2-usdhc";
                        reg = <0x402f0000 0x1000>;

diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index efe5398e12403033cdc2021092ec8db003b49d29..42646b2d16b082bfef13f7d13a8149201cfe7761 100644 (file)
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -626,6 +626,16 @@
                        status = "disabled";
                };
 
+               adc0: adc@401f8000 {
+                       compatible = "nxp,s32g3-sar-adc", "nxp,s32g2-sar-adc";
+                       reg = <0x401f8000 0x1000>;
+                       interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 0x41>;
+                       dmas = <&edma0 0 32>;
+                       dma-names = "rx";
+                       status = "disabled";
+               };
+
                swt4: watchdog@40200000 {
                        compatible = "nxp,s32g3-swt", "nxp,s32g2-swt";
                        reg = <0x40200000 0x1000>;
@@ -810,6 +820,16 @@
                        status = "disabled";
                };
 
+               adc1: adc@402e8000 {
+                       compatible = "nxp,s32g3-sar-adc", "nxp,s32g2-sar-adc";
+                       reg = <0x402e8000 0x1000>;
+                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks 0x41>;
+                       dmas = <&edma1 1 32>;
+                       dma-names = "rx";
+                       status = "disabled";
+               };
+
                usdhc0: mmc@402f0000 {
                        compatible = "nxp,s32g3-usdhc",
                                     "nxp,s32g2-usdhc";