Support alternate (C0 /6) encoding of SHL on x86 and amd64. Fixes #209995.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2196

diff --git a/VEX/priv/guest_amd64_toIR.c b/VEX/priv/guest_amd64_toIR.c
index 92438aee295b6068e5711206708775dd060019a3..2d99586061a43cb9cf88c044bd461119b9605d83 100644 (file)
--- a/VEX/priv/guest_amd64_toIR.c
+++ b/VEX/priv/guest_amd64_toIR.c
@@ -3278,7 +3278,7 @@ ULong dis_Grp2 ( VexAbiInfo* vbi,
    }
 
    isShift = False;
-   switch (gregLO3ofRM(modrm)) { case 4: case 5: case 7: isShift = True; }
+   switch (gregLO3ofRM(modrm)) { case 4: case 5: case 6: case 7: isShift = True; }
 
    isRotate = False;
    switch (gregLO3ofRM(modrm)) { case 0: case 1: isRotate = True; }
@@ -3286,11 +3286,6 @@ ULong dis_Grp2 ( VexAbiInfo* vbi,
    isRotateC = False;
    switch (gregLO3ofRM(modrm)) { case 2: case 3: isRotateC = True; }
 
-   if (gregLO3ofRM(modrm) == 6) {
-      *decode_OK = False;
-      return delta;
-   }
-
    if (!isShift && !isRotate && !isRotateC) {
       /*NOTREACHED*/
       vpanic("dis_Grp2(Reg): unhandled case(amd64)");
@@ -3365,6 +3360,7 @@ ULong dis_Grp2 ( VexAbiInfo* vbi,
       switch (gregLO3ofRM(modrm)) { 
          case 4: op64 = Iop_Shl64; break;
          case 5: op64 = Iop_Shr64; break;
+         case 6: op64 = Iop_Shl64; break;
          case 7: op64 = Iop_Sar64; break;
          /*NOTREACHED*/
          default: vpanic("dis_Grp2:shift"); break;

diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c
index 41481b6b6e41e6ab9b1a6a2913c2792b58dffbb5..1d527326b9872076275739fb1ed5358501729564 100644 (file)
--- a/VEX/priv/guest_x86_toIR.c
+++ b/VEX/priv/guest_x86_toIR.c
@@ -2392,7 +2392,7 @@ UInt dis_Grp2 ( UChar sorb,
    }
 
    isShift = False;
-   switch (gregOfRM(modrm)) { case 4: case 5: case 7: isShift = True; }
+   switch (gregOfRM(modrm)) { case 4: case 5: case 6: case 7: isShift = True; }
 
    isRotate = False;
    switch (gregOfRM(modrm)) { case 0: case 1: isRotate = True; }
@@ -2400,11 +2400,6 @@ UInt dis_Grp2 ( UChar sorb,
    isRotateC = False;
    switch (gregOfRM(modrm)) { case 2: case 3: isRotateC = True; }
 
-   if (gregOfRM(modrm) == 6) {
-      *decode_OK = False;
-      return delta;
-   }
-
    if (!isShift && !isRotate && !isRotateC) {
       /*NOTREACHED*/
       vpanic("dis_Grp2(Reg): unhandled case(x86)");
@@ -2449,6 +2444,7 @@ UInt dis_Grp2 ( UChar sorb,
       switch (gregOfRM(modrm)) { 
          case 4: op32 = Iop_Shl32; break;
          case 5: op32 = Iop_Shr32; break;
+         case 6: op32 = Iop_Shl32; break;
          case 7: op32 = Iop_Sar32; break;
          /*NOTREACHED*/
          default: vpanic("dis_Grp2:shift"); break;