soc: mediatek: mtk-dvfsrc: Write bandwidth to EMI DDR if present

In preparation for adding support for DVFSRC Version 4, add a new
`has_emi_ddr` member to struct dvfsrc_soc_data: if true, write the
DRAM bandwidth both to the BW_AVG and to the newly defined EMI_BW
register, present only on DVFSRC v4.

Currently supported SoCs will not use this, as has_emi_ddr is left
out from their platform data, hence reading false.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/drivers/soc/mediatek/mtk-dvfsrc.c b/drivers/soc/mediatek/mtk-dvfsrc.c
index 3cbccbb7469adbc22bd50f0cdbd5eb3590096312..bf0e7b01d2554930ae2c3ff7db26b3d9fcf80f1b 100644 (file)
--- a/drivers/soc/mediatek/mtk-dvfsrc.c
+++ b/drivers/soc/mediatek/mtk-dvfsrc.c
@@ -72,6 +72,7 @@ struct mtk_dvfsrc {
 
 struct dvfsrc_soc_data {
        const int *regs;
+       const bool has_emi_ddr;
        const struct dvfsrc_opp_desc *opps_desc;
        u32 (*calc_dram_bw)(struct mtk_dvfsrc *dvfsrc, int type, u64 bw);
        u32 (*get_target_level)(struct mtk_dvfsrc *dvfsrc);
@@ -107,6 +108,7 @@ enum dvfsrc_regs {
        DVFSRC_SW_BW,
        DVFSRC_SW_PEAK_BW,
        DVFSRC_SW_HRT_BW,
+       DVFSRC_SW_EMI_BW,
        DVFSRC_VCORE,
        DVFSRC_REGS_MAX,
 };
@@ -292,6 +294,9 @@ static void __dvfsrc_set_dram_bw_v1(struct mtk_dvfsrc *dvfsrc, u32 reg,
                new_bw = max(new_bw, min_bw);
 
        dvfsrc_writel(dvfsrc, reg, new_bw);
+
+       if (type == DVFSRC_BW_AVG && dvfsrc->dvd->has_emi_ddr)
+               dvfsrc_writel(dvfsrc, DVFSRC_SW_EMI_BW, bw);
 }
 
 static void dvfsrc_set_dram_bw_v1(struct mtk_dvfsrc *dvfsrc, u64 bw)