arm64: dts: qcom: x1e80100: Add crypto engine

On X Elite, there is a crypto engine IP block similar to ones found on
SM8x50 platforms.

Describe the crypto engine and its BAM.

Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251211-crypto_dt_node_x1e80100-v6-1-03830ed53352@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index a17900eacb20396a9792efcfcd6ce6dd877435d1..bb7c14d473c9c523e1501f9379ee7049c6287e96 100644 (file)
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -3845,6 +3845,32 @@
                        status = "disabled";
                };
 
+               cryptobam: dma-controller@1dc4000 {
+                       compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
+                       reg = <0x0 0x01dc4000 0x0 0x28000>;
+                       interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       iommus = <&apps_smmu 0x480 0x0>,
+                                <&apps_smmu 0x481 0x0>;
+                       qcom,ee = <0>;
+                       qcom,controlled-remotely;
+                       num-channels = <20>;
+                       qcom,num-ees = <4>;
+               };
+
+               crypto: crypto@1dfa000 {
+                       compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce";
+                       reg = <0x0 0x01dfa000 0x0 0x6000>;
+                       dmas = <&cryptobam 4>, <&cryptobam 5>;
+                       dma-names = "rx",
+                                   "tx";
+                       iommus = <&apps_smmu 0x480 0x0>,
+                                <&apps_smmu 0x481 0x0>;
+                       interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+                       interconnect-names = "memory";
+               };
+
                tcsr_mutex: hwlock@1f40000 {
                        compatible = "qcom,tcsr-mutex";
                        reg = <0 0x01f40000 0 0x20000>;