arm64: dts: renesas: r8a779a0: Add GE7800 GPU node

Describe Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64
present in Renesas R-Car R8A779A0 V3U SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251106212342.2771579-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index b08865841476102efeafce6591c9355f792eb41d..4b101a6dc49dd30fc075bbd565940c914c722a31 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -2337,6 +2337,23 @@
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               gpu: gpu@fd000000 {
+                       compatible = "renesas,r8a779a0-gpu",
+                                    "img,img-ge7800",
+                                    "img,img-rogue";
+                       reg = <0 0xfd000000 0 0x40000>;
+                       interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_CORE R8A779A0_CLK_ZG>,
+                                <&cpg CPG_CORE R8A779A0_CLK_S3D1>,
+                                <&cpg CPG_MOD 0>;
+                       clock-names = "core", "mem", "sys";
+                       power-domains = <&sysc R8A779A0_PD_3DG_A>,
+                                       <&sysc R8A779A0_PD_3DG_B>;
+                       power-domain-names = "a", "b";
+                       resets = <&cpg 0>;
+                       status = "disabled";
+               };
+
                fcpvd0: fcp@fea10000 {
                        compatible = "renesas,fcpv";
                        reg = <0 0xfea10000 0 0x200>;