We need to describe one more register (offset and field bitmask) to
the PCS code. Move the existing PCS offset and interrupt enable bits
to a new struct and pass that in to stmmac_integrated_pcs_init().
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w2tPU-0000000DYAd-0ssk@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
#include "stmmac_ptp.h"
#include "dwmac1000.h"
+static const struct stmmac_pcs_info dwmac1000_pcs_info = {
+ .pcs_offset = GMAC_PCS_BASE,
+ .int_mask = GMAC_INT_DISABLE_PCSLINK | GMAC_INT_DISABLE_PCSAN,
+};
+
static int dwmac1000_pcs_init(struct stmmac_priv *priv)
{
if (!priv->dma_cap.pcs)
return 0;
- return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
- GMAC_INT_DISABLE_PCSLINK |
- GMAC_INT_DISABLE_PCSAN);
+ return stmmac_integrated_pcs_init(priv, &dwmac1000_pcs_info);
}
static void dwmac1000_core_init(struct mac_device_info *hw,
#include "dwmac4.h"
#include "dwmac5.h"
+static const struct stmmac_pcs_info dwmac4_pcs_info = {
+ .pcs_offset = GMAC_PCS_BASE,
+ .int_mask = GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE,
+};
+
static int dwmac4_pcs_init(struct stmmac_priv *priv)
{
if (!priv->dma_cap.pcs)
return 0;
- return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,
- GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE);
+ return stmmac_integrated_pcs_init(priv, &dwmac4_pcs_info);
}
static void dwmac4_core_init(struct mac_device_info *hw,
return -EINVAL;
}
-int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
- u32 int_mask)
+int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
+ const struct stmmac_pcs_info *pcs_info)
{
struct stmmac_pcs *spcs;
return -ENOMEM;
spcs->priv = priv;
- spcs->base = priv->ioaddr + offset;
- spcs->int_mask = int_mask;
+ spcs->base = priv->ioaddr + pcs_info->pcs_offset;
+ spcs->int_mask = pcs_info->int_mask;
spcs->pcs.ops = &dwmac_integrated_pcs_ops;
__set_bit(PHY_INTERFACE_MODE_SGMII, spcs->pcs.supported_interfaces);
struct stmmac_priv;
+struct stmmac_pcs_info {
+ unsigned int pcs_offset;
+ u32 int_mask;
+};
+
struct stmmac_pcs {
struct stmmac_priv *priv;
void __iomem *base;
struct stmmac_extra_stats *x);
int stmmac_integrated_pcs_get_phy_intf_sel(struct phylink_pcs *pcs,
phy_interface_t interface);
-int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,
- u32 int_mask);
+int stmmac_integrated_pcs_init(struct stmmac_priv *priv,
+ const struct stmmac_pcs_info *pcs_info);
/**
* dwmac_ctrl_ane - To program the AN Control Register.