backport: re PR target/64304 (AArch64 miscompilation with -mgeneral-regs-only)

        Backported from mainline
        2015-01-19  Jiong Wang  <jiong.wang@arm.com>
                    Andrew Pinski  <apinski@cavium.com>

        PR target/64304
        * config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"): Deleted.
        (ashl<mode>3): Don't expand if operands[2] is not constant.

From-SVN: r222812

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d8fe750ee8b7d6901cf54a40d380a09fdacaf5ca..8b0ac3d680e9a288ad0b973a3702aaefc7ad45cf 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2015-05-05  Shanyao Chen  <chenshanyao@huawei.com>
+
+       Backported from mainline
+       2015-01-19  Jiong Wang  <jiong.wang@arm.com>
+                   Andrew Pinski  <apinski@cavium.com>
+
+       PR target/64304
+       * config/aarch64/aarch64.md (define_insn "*ashl<mode>3_insn"): Deleted.
+       (ashl<mode>3): Don't expand if operands[2] is not constant.
+
 2015-05-05  Peter Bergner  <bergner@vnet.ibm.com>
 
        Backport from mainline.

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 9c096c2c86aeaa30b568eced819495155d1f6b40..1085e4df889d4d4a09101cdbca95ba8f7f3bbf5c 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -2719,6 +2719,8 @@
            DONE;
           }
       }
+    else
+      FAIL;
   }
 )
 
@@ -2947,15 +2949,6 @@
   [(set_attr "type" "shift_reg")]
 )
 
-(define_insn "*ashl<mode>3_insn"
-  [(set (match_operand:SHORT 0 "register_operand" "=r")
-       (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r")
-                     (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))]
-  ""
-  "lsl\\t%<w>0, %<w>1, %<w>2"
-  [(set_attr "type" "shift_reg")]
-)
-
 (define_insn "*<optab><mode>3_insn"
   [(set (match_operand:SHORT 0 "register_operand" "=r")
        (ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7a7034eb31207be3c12192aa59d5ad2df1ac6742..05689e3b186df8800244a6dfbcf820f47be3b305 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2015-05-05  Shanyao chen  <chenshanyao@huawei.com>
+
+       Backported from mainline
+       2015-01-19  Jiong Wang  <jiong.wang@arm.com>
+
+       * gcc.target/aarch64/pr64304.c: New testcase.
+
 2015-05-05  Peter Bergner  <bergner@vnet.ibm.com>
 
        Backport from mainline.

diff --git a/gcc/testsuite/gcc.target/aarch64/pr64304.c b/gcc/testsuite/gcc.target/aarch64/pr64304.c
new file mode 100644 (file)
index 0000000..721b6b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr64304.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */ 
+/* { dg-options "-O2 --save-temps" } */ 
+ 
+unsigned char byte = 0; 
+  
+void 
+set_bit (unsigned int bit, unsigned char value) 
+{ 
+  unsigned char mask = (unsigned char) (1 << (bit & 7)); 
+ 
+  if (! value) 
+    byte &= (unsigned char)~mask; 
+  else 
+    byte |= mask; 
+    /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, 7" } } */ 
+} 
+  
+/* { dg-final { cleanup-saved-temps } } */