Fix ARM NAN fraction bits.

Current ARM soft-float implementation is violating the RTABI
(http://infocenter.arm.com/help/topic/com.arm.doc.ihi0043d/IHI0043D_rtabi.pdf)
Section 4.1.1.1:

When not otherwise specified by IEEE 754, the result on an invalid
operation should be the quiet NaN bit pattern with only the most
significant bit of the significand set, and all other significand bits
zero.

This patch fixes it by setting _FP_NANFRAC_* to zero.

Ran make check test with -mfloat-abi=soft. No regression.

	* sysdeps/arm/soft-fp/sfp-machine.h (_FP_NANFRAC_S, _FP_NANFRAC_D)
	(_FP_NANFRAC_Q): Set to zero.

diff --git a/ChangeLog b/ChangeLog
index af8ada17056eead9ff4394095b480a4eb48b73fb..98d40f28c473ef5113e1e8048e05c9c84140633d 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2014-02-27  Joey Ye  <joey.ye@arm.com>
+
+       * sysdeps/arm/soft-fp/sfp-machine.h (_FP_NANFRAC_S, _FP_NANFRAC_D)
+       (_FP_NANFRAC_Q): Set to zero.
+
 2014-02-27  Siddhesh Poyarekar  <siddhesh@redhat.com>
 
        [BZ #16623]

diff --git a/sysdeps/arm/soft-fp/sfp-machine.h b/sysdeps/arm/soft-fp/sfp-machine.h
index 52a08b529824402e2a259a58bc0110307b420ad0..32697fef44ad208284f0363674e1411ab7965516 100644 (file)
--- a/sysdeps/arm/soft-fp/sfp-machine.h
+++ b/sysdeps/arm/soft-fp/sfp-machine.h
@@ -21,9 +21,9 @@
 #define _FP_DIV_MEAT_D(R,X,Y)  _FP_DIV_MEAT_2_udiv(D,R,X,Y)
 #define _FP_DIV_MEAT_Q(R,X,Y)  _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
 
-#define _FP_NANFRAC_S          ((_FP_QNANBIT_S << 1) - 1)
-#define _FP_NANFRAC_D          ((_FP_QNANBIT_D << 1) - 1), -1
-#define _FP_NANFRAC_Q          ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANFRAC_S          0
+#define _FP_NANFRAC_D          0, 0
+#define _FP_NANFRAC_Q          0, 0, 0, 0
 #define _FP_NANSIGN_S          0
 #define _FP_NANSIGN_D          0
 #define _FP_NANSIGN_Q          0