Turn patterns/splits into define_insn_and_split

From-SVN: r44714

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fdc4d58430c72a6238a8d4448c055bed7f913558..4b6f70980399c09d5a9a1e3d11d5d0530373a340 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -2,7 +2,10 @@
 
        * cselib.c (cselib_record_sets): If insn is predicated, turn
        sources into IF_THEN_ELSEs.
-               
+
+       * config/ia64/ia64.md (cond_opsi2_internal, cond_opsi2_internal_b):
+       Turn into define_insn_and_split.
+
 2001-08-08  Graham Stott  <grahams@redhat.com>
 
        * final.c (shorten_branches): Update the INSN_ADDRESSES of insns

diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index 3590630f19294600bedefaa90fee6f5e61e112b3..efa37058fb2bdebd51a64913bf8226c25a658baa 100644 (file)
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -4495,7 +4495,7 @@
                                VOIDmode, operands[1], const0_rtx);
 }")
 
-(define_insn "*cond_opsi2_internal"
+(define_insn_and_split "*cond_opsi2_internal"
   [(set (match_operand:SI 0 "gr_register_operand" "=r")
        (match_operator:SI 5 "condop_operator"
          [(if_then_else:SI
@@ -4507,19 +4507,6 @@
           (match_operand:SI 4 "gr_register_operand" "r")]))]
   ""
   "#"
-  [(set_attr "itanium_class" "ialu")
-   (set_attr "predicable" "no")])
-
-(define_split
-  [(set (match_operand:SI 0 "gr_register_operand" "")
-       (match_operator:SI 5 "condop_operator"
-         [(if_then_else:SI
-            (match_operator 6 "predicate_operator"
-              [(match_operand:BI 1 "register_operand" "")
-               (const_int 0)])
-            (match_operand:SI 2 "gr_register_operand" "")
-            (match_operand:SI 3 "gr_register_operand" ""))
-          (match_operand:SI 4 "gr_register_operand" "")]))]
   "reload_completed"
   [(cond_exec
      (match_dup 6)
@@ -4531,9 +4518,12 @@
 {
   operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[6]) == NE ? EQ : NE,
                                VOIDmode, operands[1], const0_rtx);
-}")
+}"
+  [(set_attr "itanium_class" "ialu")
+   (set_attr "predicable" "no")])
+
 
-(define_insn "*cond_opsi2_internal_b"
+(define_insn_and_split "*cond_opsi2_internal_b"
   [(set (match_operand:SI 0 "gr_register_operand" "=r")
        (match_operator:SI 5 "condop_operator"
          [(match_operand:SI 4 "gr_register_operand" "r")
@@ -4545,19 +4535,6 @@
             (match_operand:SI 3 "gr_register_operand" "r"))]))]
   ""
   "#"
-  [(set_attr "itanium_class" "ialu")
-   (set_attr "predicable" "no")])
-
-(define_split
-  [(set (match_operand:SI 0 "gr_register_operand" "")
-       (match_operator:SI 5 "condop_operator"
-         [(match_operand:SI 4 "gr_register_operand" "")
-          (if_then_else:SI
-            (match_operator 6 "predicate_operator"
-              [(match_operand:BI 1 "register_operand" "")
-               (const_int 0)])
-            (match_operand:SI 2 "gr_register_operand" "")
-            (match_operand:SI 3 "gr_register_operand" ""))]))]
   "reload_completed"
   [(cond_exec
      (match_dup 6)
@@ -4569,7 +4546,9 @@
 {
   operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[6]) == NE ? EQ : NE,
                                VOIDmode, operands[1], const0_rtx);
-}")
+}"
+  [(set_attr "itanium_class" "ialu")
+   (set_attr "predicable" "no")])
 
 \f
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