amdgcn: update target-supports.exp

The backend can now vectorize more things.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp
	(check_effective_target_vect_call_copysignf): Add amdgcn.
	(check_effective_target_vect_call_sqrtf): Add amdgcn.
	(check_effective_target_vect_call_ceilf): Add amdgcn.
	(check_effective_target_vect_call_floor): Add amdgcn.
	(check_effective_target_vect_logical_reduc): Add amdgcn.

diff --git a/gcc/testsuite/ChangeLog.omp b/gcc/testsuite/ChangeLog.omp
index 16fe6f47379077516ff1c09c715de7e1ff16182b..1a1bd6aaccb48a3e614f0f9761d611018738a20b 100644 (file)
--- a/gcc/testsuite/ChangeLog.omp
+++ b/gcc/testsuite/ChangeLog.omp
@@ -1,3 +1,15 @@
+2023-04-21  Andrew Stubbs  <ams@codesourcery.com>
+
+       Backport from mainline:
+       Andrew Stubbs  <ams@codesourcery.com>
+
+       * lib/target-supports.exp
+       (check_effective_target_vect_call_copysignf): Add amdgcn.
+       (check_effective_target_vect_call_sqrtf): Add amdgcn.
+       (check_effective_target_vect_call_ceilf): Add amdgcn.
+       (check_effective_target_vect_call_floor): Add amdgcn.
+       (check_effective_target_vect_logical_reduc): Add amdgcn.
+
 2023-04-20  Andrew Stubbs  <ams@codesourcery.com>
 
        Backport from mainline:

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index d64818a018d5765c715e3219dc7145aed56b8b51..d262f58cb4428f700089d21f57f6f03590432b18 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8370,7 +8370,8 @@ proc check_effective_target_vect_call_copysignf { } {
     return [check_cached_effective_target_indexed vect_call_copysignf {
       expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
             || [istarget powerpc*-*-*]
-            || [istarget aarch64*-*-*] }}]
+            || [istarget aarch64*-*-*]
+             || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports hardware square root instructions.
@@ -8406,7 +8407,8 @@ proc check_effective_target_vect_call_sqrtf { } {
             || [istarget i?86-*-*] || [istarget x86_64-*-*]
             || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
             || ([istarget s390*-*-*]
-                && [check_effective_target_s390_vx]) }}]
+                && [check_effective_target_s390_vx])
+             || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports vector lrint calls.
@@ -8451,14 +8453,16 @@ proc check_effective_target_vect_call_ceil { } {
 
 proc check_effective_target_vect_call_ceilf { } {
     return [check_cached_effective_target_indexed vect_call_ceilf {
-      expr { [istarget aarch64*-*-*] }}]
+      expr { [istarget aarch64*-*-*]
+            || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports vector floor calls.
 
 proc check_effective_target_vect_call_floor { } {
     return [check_cached_effective_target_indexed vect_call_floor {
-      expr { [istarget aarch64*-*-*] }}]
+      expr { [istarget aarch64*-*-*]
+            || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports vector floorf calls.
@@ -8514,7 +8518,8 @@ proc check_effective_target_vect_call_roundf { } {
 # Return 1 if the target supports AND, OR and XOR reduction.
 
 proc check_effective_target_vect_logical_reduc { } {
-    return [check_effective_target_aarch64_sve]
+    return [expr { [check_effective_target_aarch64_sve]
+                  || [istarget amdgcn-*-*] }]
 }
 
 # Return 1 if the target supports the fold_extract_last optab.