]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
thermal: intel: int340x: soc_slider: Set offset only for balanced mode
authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Tue, 24 Mar 2026 17:23:46 +0000 (10:23 -0700)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Tue, 24 Mar 2026 18:00:12 +0000 (19:00 +0100)
The slider offset can be set via debugfs for balanced mode. The offset
should be only applicable in balanced mode. For other modes, it should
be 0 when writing to MMIO offset,

Fixes: 8306bcaba06d ("thermal: intel: int340x: Add module parameter to change slider offset")
Tested-by: Erin Park <erin.park@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: 6.18+ <stable@vger.kernel.org> # 6.18+
[ rjw: Subject and changelog tweaks ]
Link: https://patch.msgid.link/20260324172346.3317145-1-srinivas.pandruvada@linux.intel.com
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/thermal/intel/int340x_thermal/processor_thermal_soc_slider.c

index 49ff3bae727109cc271d6a606d355425c2ee9b8f..91f291627132aa30ed5663fb9791dfdaaeb6f52e 100644 (file)
@@ -176,15 +176,21 @@ static inline void write_soc_slider(struct proc_thermal_device *proc_priv, u64 v
 
 static void set_soc_power_profile(struct proc_thermal_device *proc_priv, int slider)
 {
+       u8 offset;
        u64 val;
 
        val = read_soc_slider(proc_priv);
        val &= ~SLIDER_MASK;
        val |= FIELD_PREP(SLIDER_MASK, slider) | BIT(SLIDER_ENABLE_BIT);
 
+       if (slider == SOC_SLIDER_VALUE_MINIMUM || slider == SOC_SLIDER_VALUE_MAXIMUM)
+               offset = 0;
+       else
+               offset = slider_offset;
+
        /* Set the slider offset from module params */
        val &= ~SLIDER_OFFSET_MASK;
-       val |= FIELD_PREP(SLIDER_OFFSET_MASK, slider_offset);
+       val |= FIELD_PREP(SLIDER_OFFSET_MASK, offset);
 
        write_soc_slider(proc_priv, val);
 }