The "pcl711" driver uses an admin-supplied configuration option
(`it->options[0]`) to configure the I/O port base address of an
Advantech PCL-711 series board or an Adlink ACL-8112 series board. It
currently allows any base address to be configured but the hardware only
supports base addresses (configured by on-board DIP switches) in the
range 0 to 0x3F0 (for PCL-711) or 0x200 to 0x3F0 (for ACL-8112) on
16-byte boundaries.
Store the minimum supported I/O base address in the static board
information array elements, and add a sanity check to ensure the device
is not configured at an unsupported base address.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Link: https://patch.msgid.link/20260130170416.49994-33-abbotti@mev.co.uk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
int n_aichan;
int n_aochan;
int maxirq;
+ unsigned int min_io_start;
const struct comedi_lrange *ai_range_type;
};
.n_aichan = 16,
.n_aochan = 2,
.maxirq = 15,
+ .min_io_start = 0x200,
.ai_range_type = &range_acl8112hg_ai,
}, {
.name = "acl8112dg",
.n_aichan = 16,
.n_aochan = 2,
.maxirq = 15,
+ .min_io_start = 0x200,
.ai_range_type = &range_acl8112dg_ai,
},
};
struct comedi_subdevice *s;
int ret;
- ret = comedi_request_region(dev, it->options[0], 0x10);
+ ret = comedi_check_request_region(dev, it->options[0], 0x10,
+ board->min_io_start, 0x3ff, 16);
if (ret)
return ret;