]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
rtc: renesas-rtca3: Fix PIE clear polling condition in alarm setup error path
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 2 Jun 2026 19:25:55 +0000 (20:25 +0100)
committerAlexandre Belloni <alexandre.belloni@bootlin.com>
Sun, 21 Jun 2026 23:59:16 +0000 (01:59 +0200)
In rtca3_set_alarm(), the setup_failed path attempts to disable the
Periodic Interrupt Enable (PIE) bit and wait until it is cleared.
However, the polling condition passed to readb_poll_timeout_atomic()
uses an incorrect expression:

    !(tmp & ~RTCA3_RCR1_PIE)

As ~RTCA3_RCR1_PIE evaluates to a mask of all bits except PIE, the
condition effectively waits for all non-PIE bits to become zero, which
is unrelated to the intended operation and is unlikely to ever be true.
This causes the poll to time out unnecessarily.

Fix the condition to check for the PIE bit itself being cleared:

    !(tmp & RTCA3_RCR1_PIE)

This correctly waits until PIE is deasserted after being cleared.

Fixes: d4488377609e3 ("rtc: renesas-rtca3: Add driver for RTCA-3 available on Renesas RZ/G3S SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://patch.msgid.link/20260602192559.1791344-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
drivers/rtc/rtc-renesas-rtca3.c

index cbabaa4dc96a5a962ac40c62ca59429d7b53ebf5..2dc080d0eb6cda67b4aaa16b8686c6da0c22bfe1 100644 (file)
@@ -455,7 +455,7 @@ setup_failed:
                 * specified timeout for setup.
                 */
                writeb(rcr1 & ~RTCA3_RCR1_PIE, priv->base + RTCA3_RCR1);
-               readb_poll_timeout_atomic(priv->base + RTCA3_RCR1, tmp, !(tmp & ~RTCA3_RCR1_PIE),
+               readb_poll_timeout_atomic(priv->base + RTCA3_RCR1, tmp, !(tmp & RTCA3_RCR1_PIE),
                                          10, RTCA3_DEFAULT_TIMEOUT_US);
                atomic_set(&priv->alrm_sstep, RTCA3_ALRM_SSTEP_DONE);
        }