re PR target/42113 (Internal Compiler error with -O3, breaking commit known)

	PR target/42113
	* config/alpha/alpha.md (*cmp_sadd_si): Change mode
	of scratch register to DImode.  Split to DImode comparison operator.
	Use SImode subreg of scratch register in the multiplication.
	(*cmp_sadd_sidi): Ditto.
	(*cmp_ssub_si): Ditto.
	(*cmp_ssub_sidi): Ditto.

From-SVN: r157775

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3b6692cc69baffe9543f26cddea04d0d967a8702..838e39de9d3417b3031405ad1b9e643fec591244 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2010-03-27  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/42113
+       * config/alpha/alpha.md (*cmp_sadd_si): Change mode
+       of scratch register to DImode.  Split to DImode comparison operator.
+       Use SImode subreg of scratch register in the multiplication.
+       (*cmp_sadd_sidi): Ditto.
+       (*cmp_ssub_si): Ditto.
+       (*cmp_ssub_sidi): Ditto.
+
 2010-03-23  Kaz Kojima  <kkojima@gcc.gnu.org>
 
        Backport from mainline:

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index 72a8f2f2685ea9208e137b053324924917239c9e..35ce96d5e72b8709f23f1312457f35dea4cd8d43 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -4338,20 +4338,22 @@
                   (match_operand:SI 3 "const48_operand" "I")
                   (const_int 0))
                 (match_operand:SI 4 "sext_add_operand" "rIO")))
-   (clobber (match_scratch:SI 5 "=r"))]
+   (clobber (match_scratch:DI 5 "=r"))]
   ""
   "#"
   ""
   [(set (match_dup 5)
-       (match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
+       (match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
-       (plus:SI (mult:SI (match_dup 5) (match_dup 3))
+       (plus:SI (mult:SI (match_dup 6) (match_dup 3))
                 (match_dup 4)))]
 {
   if (can_create_pseudo_p ())
-    operands[5] = gen_reg_rtx (SImode);
+    operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
-    operands[5] = operands[0];
+    operands[5] = gen_lowpart (DImode, operands[0]);
+
+  operands[6] = gen_lowpart (SImode, operands[5]);
 })
 
 (define_insn_and_split "*cmp_sadd_sidi"
@@ -4364,20 +4366,22 @@
                     (match_operand:SI 3 "const48_operand" "I")
                     (const_int 0))
                   (match_operand:SI 4 "sext_add_operand" "rIO"))))
-   (clobber (match_scratch:SI 5 "=r"))]
+   (clobber (match_scratch:DI 5 "=r"))]
   ""
   "#"
   ""
   [(set (match_dup 5)
-       (match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
+       (match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
-       (sign_extend:DI (plus:SI (mult:SI (match_dup 5) (match_dup 3))
+       (sign_extend:DI (plus:SI (mult:SI (match_dup 6) (match_dup 3))
                                 (match_dup 4))))]
 {
   if (can_create_pseudo_p ())
-    operands[5] = gen_reg_rtx (SImode);
+    operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
-    operands[5] = gen_lowpart (SImode, operands[0]);
+    operands[5] = operands[0];
+
+  operands[6] = gen_lowpart (SImode, operands[5]);
 })
 
 (define_insn_and_split "*cmp_ssub_di"
@@ -4414,20 +4418,22 @@
                    (match_operand:SI 3 "const48_operand" "I")
                    (const_int 0))
                  (match_operand:SI 4 "reg_or_8bit_operand" "rI")))
-   (clobber (match_scratch:SI 5 "=r"))]
+   (clobber (match_scratch:DI 5 "=r"))]
   ""
   "#"
   ""
   [(set (match_dup 5)
-       (match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
+       (match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
-       (minus:SI (mult:SI (match_dup 5) (match_dup 3))
+       (minus:SI (mult:SI (match_dup 6) (match_dup 3))
                 (match_dup 4)))]
 {
   if (can_create_pseudo_p ())
-    operands[5] = gen_reg_rtx (SImode);
+    operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
-    operands[5] = operands[0];
+    operands[5] = gen_lowpart (DImode, operands[0]);
+
+  operands[6] = gen_lowpart (SImode, operands[5]);
 })
 
 (define_insn_and_split "*cmp_ssub_sidi"
@@ -4440,20 +4446,22 @@
                      (match_operand:SI 3 "const48_operand" "I")
                      (const_int 0))
                    (match_operand:SI 4 "reg_or_8bit_operand" "rI"))))
-   (clobber (match_scratch:SI 5 "=r"))]
+   (clobber (match_scratch:DI 5 "=r"))]
   ""
   "#"
   ""
   [(set (match_dup 5)
-       (match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
+       (match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
    (set (match_dup 0)
-       (sign_extend:DI (minus:SI (mult:SI (match_dup 5) (match_dup 3))
+       (sign_extend:DI (minus:SI (mult:SI (match_dup 6) (match_dup 3))
                                  (match_dup 4))))]
 {
   if (can_create_pseudo_p ())
-    operands[5] = gen_reg_rtx (SImode);
+    operands[5] = gen_reg_rtx (DImode);
   else if (reg_overlap_mentioned_p (operands[5], operands[4]))
-    operands[5] = gen_lowpart (SImode, operands[0]);
+    operands[5] = operands[0];
+
+  operands[6] = gen_lowpart (SImode, operands[5]);
 })
 \f
 ;; Here are the CALL and unconditional branch insns.  Calls on NT and OSF