arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB3.0 PHYs and xHCI controllers

Enable the USB3.0 (CH0) and USB3.1 (CH1) host controllers on the RZ/V2H
Evaluation Kit. The CN4 stacked connector on the EVK provides access to
both channels, with CH0 corresponding to USB3.0 and CH1 to USB3.1.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251119110505.100253-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
index 90d93116fabd9436c78b5a8a17ba0162d3a98c47..962a544fc50aa3c9e4330711554f14d2a0ad63dc 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
@@ -455,6 +455,16 @@
                };
        };
 
+       usb30_pins: usb30 {
+               pinmux = <RZV2H_PORT_PINMUX(B, 0, 14)>, /* USB30_VBUSEN */
+                        <RZV2H_PORT_PINMUX(B, 1, 14)>; /* USB30_OVRCURN */
+       };
+
+       usb31_pins: usb31 {
+               pinmux = <RZV2H_PORT_PINMUX(6, 2, 14)>, /* USB31_VBUSEN */
+                        <RZV2H_PORT_PINMUX(6, 3, 14)>; /* USB31_OVRCURN */
+       };
+
        xspi_pins: xspi0 {
                ctrl {
                        pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";
@@ -521,10 +531,30 @@
        status = "okay";
 };
 
+&usb3_phy0 {
+       status = "okay";
+};
+
+&usb3_phy1 {
+       status = "okay";
+};
+
 &wdt1 {
        status = "okay";
 };
 
+&xhci0 {
+       pinctrl-0 = <&usb30_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&xhci1 {
+       pinctrl-0 = <&usb31_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
 &xspi {
        pinctrl-0 = <&xspi_pins>;
        pinctrl-names = "default";