drm/rockchip: vop2: Only wait for changed layer cfg done when there is pending cfgdon...

The write of cfgdone bits always done at .atomic_flush.
When userspace makes plane zpos changes of two crtc within one commit,
at the .atomic_begin stage, crtcN will never receive the "layer change
cfg done" event of crtcM because crtcM has not yet written "cfgdone".
So only wait when there is pending cfgdone bits to avoid long timeout.

Fixes: 3e89a8c68354 ("drm/rockchip: vop2: Fix the update of LAYER/PORT select registers when there are multi display output on rk3588/rk3568")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20250718064120.8811-2-andyshrk@163.com

diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
index 855386a6a9f5c63da6af61d9300f2d30a2b4dba1..f3950e8476a75b5897a0380124fe58d76b9014fc 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2144,6 +2144,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
        u8 layer_sel_id;
        unsigned int ofs;
        u32 ovl_ctrl;
+       u32 cfg_done;
        int i;
        struct vop2_video_port *vp0 = &vop2->vps[0];
        struct vop2_video_port *vp1 = &vop2->vps[1];
@@ -2298,8 +2299,16 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp)
                rk3568_vop2_wait_for_port_mux_done(vop2);
        }
 
-       if (layer_sel != old_layer_sel && atv_layer_sel != old_layer_sel)
-               rk3568_vop2_wait_for_layer_cfg_done(vop2, vop2->old_layer_sel);
+       if (layer_sel != old_layer_sel && atv_layer_sel != old_layer_sel) {
+               cfg_done = vop2_readl(vop2, RK3568_REG_CFG_DONE);
+               cfg_done &= (BIT(vop2->data->nr_vps) - 1);
+               cfg_done &= ~BIT(vp->id);
+               /*
+                * Changes of other VPs' overlays have not taken effect
+                */
+               if (cfg_done)
+                       rk3568_vop2_wait_for_layer_cfg_done(vop2, vop2->old_layer_sel);
+       }
 
        vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel);
        mutex_unlock(&vop2->ovl_lock);