Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fb22cebc30bafa58c6eb4bfbba2fdea083310b6d..68c266467bb24a371ed92874e34ecfa9fd273a84 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,81 @@
+2023-05-20  Gerald Pfeifer  <gerald@pfeifer.com>
+
+       * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
+       section.
+
+2023-05-20  Pan Li  <pan2.li@intel.com>
+
+       * mode-switching.cc (entity_map): Initialize the array to zero.
+       (bb_info): Ditto.
+
+2023-05-20  Triffid Hunter  <triffid.hunter@gmail.com>
+
+       PR target/105753
+       * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
+       Remove superfluous "parallel" in insn pattern.
+       ([u]divmod<mode>4): Tidy code.  Use gcc_unreachable() instead of
+       printing error text to assembly.
+
+2023-05-20  Andrew Pinski  <apinski@marvell.com>
+
+       * expr.cc (fold_single_bit_test): Rename to ...
+       (expand_single_bit_test): This and expand directly.
+       (do_store_flag): Update for the rename function.
+
+2023-05-20  Andrew Pinski  <apinski@marvell.com>
+
+       * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
+       instead of shift/and.
+
+2023-05-20  Andrew Pinski  <apinski@marvell.com>
+
+       * expr.cc (fold_single_bit_test): Add an assert
+       and simplify based on code being NE_EXPR or EQ_EXPR.
+
+2023-05-20  Andrew Pinski  <apinski@marvell.com>
+
+       * expr.cc (fold_single_bit_test): Take inner and bitnum
+       instead of arg0 and arg1. Update the code.
+       (do_store_flag): Don't create a tree when calling
+       fold_single_bit_test instead just call it with the bitnum
+       and the inner tree.
+
+2023-05-20  Andrew Pinski  <apinski@marvell.com>
+
+       * expr.cc (fold_single_bit_test): Use get_def_for_expr
+       instead of checking the inner's code.
+
+2023-05-20  Andrew Pinski  <apinski@marvell.com>
+
+       * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
+       (fold_single_bit_test): This and simplify.
+
+2023-05-20  Andrew Pinski  <apinski@marvell.com>
+
+       * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
+       expr.cc.
+       (fold_single_bit_test): Likewise.
+       * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
+       (fold_single_bit_test): Likewise and make static.
+       * fold-const.h (fold_single_bit_test): Remove declaration.
+
+2023-05-20  Die Li  <lidie@eswincomputing.com>
+
+       * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
+       checking.
+
+2023-05-20  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>
+
+       * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
+
+2023-05-20  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>
+
+       PR target/106888
+       * config/riscv/bitmanip.md
+       (<bitmanip_optab>disi2): Match with any_extend.
+       (<bitmanip_optab>disi2_sext): New pattern to match
+       with sign extend using an ANDI instruction.
+
 2023-05-19  Nathan Sidwell  <nathan@acm.org>
 
        PR other/99451

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 3113e73604c8b3c4ff1671b7305c025ad56ba230..7b10b7bde803a4dfdcbc1d303849c49b55b6b206 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230520
+20230521

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ef6ca54abdcc96fdca9ad53b810e30f8de583106..4dc720bf1c3ce1ef4198811543fab3b01720e97d 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,23 @@
+2023-05-20  Triffid Hunter  <triffid.hunter@gmail.com>
+
+       PR target/105753
+       * gcc.target/avr/torture/pr105753.c: New test.
+
+2023-05-20  Die Li  <lidie@eswincomputing.com>
+
+       * gcc.target/riscv/xtheadcondmov-indirect-rv32.c: New test.
+       * gcc.target/riscv/xtheadcondmov-indirect-rv64.c: New test.
+
+2023-05-20  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>
+
+       * gcc.target/riscv/zbs-bext-02.c: New test.
+
+2023-05-20  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>
+
+       PR target/106888
+       * gcc.target/riscv/pr106888.c: New test.
+       * gcc.target/riscv/zbbw.c: Check for ANDI.
+
 2023-05-19  Patrick Palka  <ppalka@redhat.com>
 
        PR c++/97340