}
/* Step1: Reshape the VL/VTYPE status to make sure everything compatible. */
- hash_set<basic_block> pred_cfg_bbs = get_all_predecessors (cfg_bb);
+ auto_vec<basic_block> pred_cfg_bbs = get_dominated_by (CDI_POST_DOMINATORS, cfg_bb);
FOR_EACH_EDGE (e, ei, cfg_bb->preds)
{
sbitmap avout = m_vector_manager->vector_avout[e->src->index];
{
/* Initialization of RTL_SSA. */
calculate_dominance_info (CDI_DOMINATORS);
+ calculate_dominance_info (CDI_POST_DOMINATORS);
df_analyze ();
crtl->ssa = new function_info (cfun);
}
{
/* Finalization of RTL_SSA. */
free_dominance_info (CDI_DOMINATORS);
+ free_dominance_info (CDI_POST_DOMINATORS);
if (crtl->ssa->perform_pending_updates ())
cleanup_cfg (0);
delete crtl->ssa;