drm/i915/irq: add platform specific display irq ack functions

Add i9xx_display_irq_ack() and vlv_display_irq_ack() to group together
the various irq ack parts for the platforms, to declutter the core i915
irq code from the details.

Introduce struct intel_display_irq_state to group together all the data
the ack functions need. In the follow-up, this state will be passed on
to similar platform specific handler functions.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/30d2f1c0c6acd997b841f0dfc538f703e064998d.1778688699.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 9d6596ad8b3b9789a25690dad7da58b3d8b2e3d7..5eefb7e093c49b11b8f8b7d6da8ebaf66ab145a4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -23,6 +23,7 @@
 #include "intel_fifo_underrun.h"
 #include "intel_gmbus.h"
 #include "intel_hotplug_irq.h"
+#include "intel_lpe_audio.h"
 #include "intel_parent.h"
 #include "intel_pipe_crc_regs.h"
 #include "intel_plane.h"
@@ -529,8 +530,8 @@ static void i9xx_pipestat_irq_reset(struct intel_display *display)
        }
 }
 
-void i9xx_pipestat_irq_ack(struct intel_display *display,
-                          u32 iir, u32 pipe_stats[I915_MAX_PIPES])
+static void i9xx_pipestat_irq_ack(struct intel_display *display,
+                                 u32 iir, u32 pipe_stats[I915_MAX_PIPES])
 {
        enum pipe pipe;
 
@@ -1898,8 +1899,8 @@ static void vlv_page_table_error_irq_handler(struct intel_display *display, u32
        }
 }
 
-void vlv_display_error_irq_ack(struct intel_display *display,
-                              u32 *eir, u32 *dpinvgtt)
+static void vlv_display_error_irq_ack(struct intel_display *display,
+                                     u32 *eir, u32 *dpinvgtt)
 {
        u32 emr;
 
@@ -2010,6 +2011,16 @@ static void i965_display_irq_postinstall(struct intel_display *display)
        i915_enable_asle_pipestat(display);
 }
 
+void i9xx_display_irq_ack(struct intel_display *display,
+                         struct intel_display_irq_state *state)
+{
+       if (state->iir & I915_DISPLAY_PORT_INTERRUPT)
+               state->hotplug_status = i9xx_hpd_irq_ack(display);
+
+       /* Call regardless, as some status bits might not be signalled in IIR */
+       i9xx_pipestat_irq_ack(display, state->iir, state->pipe_stats);
+}
+
 static u32 vlv_error_mask(void)
 {
        /* TODO enable other errors too? */
@@ -2065,6 +2076,32 @@ static void vlv_display_irq_postinstall(struct intel_display *display)
        spin_unlock_irq(&display->irq.lock);
 }
 
+static u32 vlv_lpe_irq_mask(struct intel_display *display)
+{
+       if (display->platform.cherryview)
+               return I915_LPE_PIPE_A_INTERRUPT | I915_LPE_PIPE_B_INTERRUPT |
+                       I915_LPE_PIPE_C_INTERRUPT;
+       else
+               return I915_LPE_PIPE_A_INTERRUPT | I915_LPE_PIPE_B_INTERRUPT;
+}
+
+void vlv_display_irq_ack(struct intel_display *display,
+                        struct intel_display_irq_state *state)
+{
+       if (state->iir & I915_DISPLAY_PORT_INTERRUPT)
+               state->hotplug_status = i9xx_hpd_irq_ack(display);
+
+       if (state->iir & I915_MASTER_ERROR_INTERRUPT)
+               vlv_display_error_irq_ack(display, &state->eir, &state->dpinvgtt);
+
+       /* Call regardless, as some status bits might not be signalled in IIR */
+       i9xx_pipestat_irq_ack(display, state->iir, state->pipe_stats);
+
+       /* The handler acks the irq, so need to call the handler here */
+       if (state->iir & vlv_lpe_irq_mask(display))
+               intel_lpe_audio_irq_handler(display);
+}
+
 static void ibx_display_irq_reset(struct intel_display *display)
 {
        if (HAS_PCH_NOP(display))

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index fd9873ce97556aed668e65a34d0e2f6fc6d21709..8d4ea53bb9dbd000a19ef0489458cd0fdc5a91bd 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -58,22 +58,30 @@ void gen11_display_irq_handler(struct intel_display *display);
 u32 gen11_gu_misc_irq_ack(struct intel_display *display, const u32 master_ctl);
 void gen11_gu_misc_irq_handler(struct intel_display *display, const u32 iir);
 
+struct intel_display_irq_state {
+       u32 iir;
+       u32 eir;
+       u32 hotplug_status;
+       u32 dpinvgtt;
+       u32 pipe_stats[I915_MAX_PIPES];
+};
+
 void intel_display_irq_reset(struct intel_display *display);
 void intel_display_irq_postinstall(struct intel_display *display);
 
+void vlv_display_irq_ack(struct intel_display *display, struct intel_display_irq_state *state);
+void i9xx_display_irq_ack(struct intel_display *display, struct intel_display_irq_state *state);
+
 u32 i9xx_display_irq_enable_mask(struct intel_display *display);
 
 u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
 void i915_enable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
 void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 status_mask);
 
-void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
-
 void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
 void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
 void valleyview_pipestat_irq_handler(struct intel_display *display, const u32 pipe_stats[I915_MAX_PIPES]);
 
-void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt);
 void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);
 
 void intel_display_irq_init(struct intel_display *display);

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c21b289b8007a30aedf1ef2cf5a42dea1d68b093..9022e32156a5fa2a0fb892bafb54a27d988ff357 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -39,7 +39,6 @@
 #include "display/intel_display_irq.h"
 #include "display/intel_hotplug.h"
 #include "display/intel_hotplug_irq.h"
-#include "display/intel_lpe_audio.h"
 
 #include "gt/intel_breadcrumbs.h"
 #include "gt/intel_gt.h"
@@ -236,17 +235,15 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
        disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
        do {
-               u32 iir, gt_iir, pm_iir;
-               u32 eir = 0, dpinvgtt = 0;
-               u32 pipe_stats[I915_MAX_PIPES] = {};
-               u32 hotplug_status = 0;
+               struct intel_display_irq_state state = {};
+               u32 gt_iir, pm_iir;
                u32 ier = 0;
 
                gt_iir = intel_uncore_read(&dev_priv->uncore, GTIIR);
                pm_iir = intel_uncore_read(&dev_priv->uncore, GEN6_PMIIR);
-               iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
+               state.iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
 
-               if (gt_iir == 0 && pm_iir == 0 && iir == 0)
+               if (gt_iir == 0 && pm_iir == 0 && state.iir == 0)
                        break;
 
                ret = IRQ_HANDLED;
@@ -272,26 +269,14 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
                if (pm_iir)
                        intel_uncore_write(&dev_priv->uncore, GEN6_PMIIR, pm_iir);
 
-               if (iir & I915_DISPLAY_PORT_INTERRUPT)
-                       hotplug_status = i9xx_hpd_irq_ack(display);
-
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
-                       vlv_display_error_irq_ack(display, &eir, &dpinvgtt);
-
-               /* Call regardless, as some status bits might not be
-                * signalled in IIR */
-               i9xx_pipestat_irq_ack(display, iir, pipe_stats);
-
-               if (iir & (I915_LPE_PIPE_A_INTERRUPT |
-                          I915_LPE_PIPE_B_INTERRUPT))
-                       intel_lpe_audio_irq_handler(display);
+               vlv_display_irq_ack(display, &state);
 
                /*
                 * VLV_IIR is single buffered, and reflects the level
                 * from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
                 */
-               if (iir)
-                       intel_uncore_write(&dev_priv->uncore, VLV_IIR, iir);
+               if (state.iir)
+                       intel_uncore_write(&dev_priv->uncore, VLV_IIR, state.iir);
 
                intel_uncore_write(&dev_priv->uncore, VLV_IER, ier);
                intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
@@ -301,13 +286,13 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
                if (pm_iir)
                        gen6_rps_irq_handler(&to_gt(dev_priv)->rps, pm_iir);
 
-               if (hotplug_status)
-                       i9xx_hpd_irq_handler(display, hotplug_status);
+               if (state.hotplug_status)
+                       i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
-                       vlv_display_error_irq_handler(display, eir, dpinvgtt);
+               if (state.iir & I915_MASTER_ERROR_INTERRUPT)
+                       vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);
 
-               valleyview_pipestat_irq_handler(display, pipe_stats);
+               valleyview_pipestat_irq_handler(display, state.pipe_stats);
        } while (0);
 
        pmu_irq_stats(dev_priv, ret);
@@ -330,16 +315,14 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
        disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
        do {
-               u32 master_ctl, iir;
-               u32 eir = 0, dpinvgtt = 0;
-               u32 pipe_stats[I915_MAX_PIPES] = {};
-               u32 hotplug_status = 0;
+               struct intel_display_irq_state state = {};
+               u32 master_ctl;
                u32 ier = 0;
 
                master_ctl = intel_uncore_read(&dev_priv->uncore, GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;
-               iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
+               state.iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR);
 
-               if (master_ctl == 0 && iir == 0)
+               if (master_ctl == 0 && state.iir == 0)
                        break;
 
                ret = IRQ_HANDLED;
@@ -362,38 +345,25 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 
                gen8_gt_irq_handler(to_gt(dev_priv), master_ctl);
 
-               if (iir & I915_DISPLAY_PORT_INTERRUPT)
-                       hotplug_status = i9xx_hpd_irq_ack(display);
-
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
-                       vlv_display_error_irq_ack(display, &eir, &dpinvgtt);
-
-               /* Call regardless, as some status bits might not be
-                * signalled in IIR */
-               i9xx_pipestat_irq_ack(display, iir, pipe_stats);
-
-               if (iir & (I915_LPE_PIPE_A_INTERRUPT |
-                          I915_LPE_PIPE_B_INTERRUPT |
-                          I915_LPE_PIPE_C_INTERRUPT))
-                       intel_lpe_audio_irq_handler(display);
+               vlv_display_irq_ack(display, &state);
 
                /*
                 * VLV_IIR is single buffered, and reflects the level
                 * from PIPESTAT/PORT_HOTPLUG_STAT, hence clear it last.
                 */
-               if (iir)
-                       intel_uncore_write(&dev_priv->uncore, VLV_IIR, iir);
+               if (state.iir)
+                       intel_uncore_write(&dev_priv->uncore, VLV_IIR, state.iir);
 
                intel_uncore_write(&dev_priv->uncore, VLV_IER, ier);
                intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
 
-               if (hotplug_status)
-                       i9xx_hpd_irq_handler(display, hotplug_status);
+               if (state.hotplug_status)
+                       i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
-                       vlv_display_error_irq_handler(display, eir, dpinvgtt);
+               if (state.iir & I915_MASTER_ERROR_INTERRUPT)
+                       vlv_display_error_irq_handler(display, state.eir, state.dpinvgtt);
 
-               valleyview_pipestat_irq_handler(display, pipe_stats);
+               valleyview_pipestat_irq_handler(display, state.pipe_stats);
        } while (0);
 
        pmu_irq_stats(dev_priv, ret);
@@ -904,39 +874,32 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
        disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
        do {
-               u32 pipe_stats[I915_MAX_PIPES] = {};
+               struct intel_display_irq_state state = {};
                u32 eir = 0, eir_stuck = 0;
-               u32 hotplug_status = 0;
-               u32 iir;
 
-               iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
-               if (iir == 0)
+               state.iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
+               if (state.iir == 0)
                        break;
 
                ret = IRQ_HANDLED;
 
-               if (iir & I915_DISPLAY_PORT_INTERRUPT)
-                       hotplug_status = i9xx_hpd_irq_ack(display);
+               i9xx_display_irq_ack(display, &state);
 
-               /* Call regardless, as some status bits might not be
-                * signalled in IIR */
-               i9xx_pipestat_irq_ack(display, iir, pipe_stats);
-
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
+               if (state.iir & I915_MASTER_ERROR_INTERRUPT)
                        i9xx_error_irq_ack(dev_priv, &eir, &eir_stuck);
 
-               intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);
+               intel_uncore_write(&dev_priv->uncore, GEN2_IIR, state.iir);
 
-               if (iir & I915_USER_INTERRUPT)
-                       intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], iir);
+               if (state.iir & I915_USER_INTERRUPT)
+                       intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0], state.iir);
 
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
+               if (state.iir & I915_MASTER_ERROR_INTERRUPT)
                        i9xx_error_irq_handler(dev_priv, eir, eir_stuck);
 
-               if (hotplug_status)
-                       i9xx_hpd_irq_handler(display, hotplug_status);
+               if (state.hotplug_status)
+                       i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-               i915_pipestat_irq_handler(display, iir, pipe_stats);
+               i915_pipestat_irq_handler(display, state.iir, state.pipe_stats);
        } while (0);
 
        pmu_irq_stats(dev_priv, ret);
@@ -1013,44 +976,37 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
        disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
 
        do {
-               u32 pipe_stats[I915_MAX_PIPES] = {};
+               struct intel_display_irq_state state = {};
                u32 eir = 0, eir_stuck = 0;
-               u32 hotplug_status = 0;
-               u32 iir;
 
-               iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
-               if (iir == 0)
+               state.iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR);
+               if (state.iir == 0)
                        break;
 
                ret = IRQ_HANDLED;
 
-               if (iir & I915_DISPLAY_PORT_INTERRUPT)
-                       hotplug_status = i9xx_hpd_irq_ack(display);
-
-               /* Call regardless, as some status bits might not be
-                * signalled in IIR */
-               i9xx_pipestat_irq_ack(display, iir, pipe_stats);
+               i9xx_display_irq_ack(display, &state);
 
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
+               if (state.iir & I915_MASTER_ERROR_INTERRUPT)
                        i9xx_error_irq_ack(dev_priv, &eir, &eir_stuck);
 
-               intel_uncore_write(&dev_priv->uncore, GEN2_IIR, iir);
+               intel_uncore_write(&dev_priv->uncore, GEN2_IIR, state.iir);
 
-               if (iir & I915_USER_INTERRUPT)
+               if (state.iir & I915_USER_INTERRUPT)
                        intel_engine_cs_irq(to_gt(dev_priv)->engine[RCS0],
-                                           iir);
+                                           state.iir);
 
-               if (iir & I915_BSD_USER_INTERRUPT)
+               if (state.iir & I915_BSD_USER_INTERRUPT)
                        intel_engine_cs_irq(to_gt(dev_priv)->engine[VCS0],
-                                           iir >> 25);
+                                           state.iir >> 25);
 
-               if (iir & I915_MASTER_ERROR_INTERRUPT)
+               if (state.iir & I915_MASTER_ERROR_INTERRUPT)
                        i9xx_error_irq_handler(dev_priv, eir, eir_stuck);
 
-               if (hotplug_status)
-                       i9xx_hpd_irq_handler(display, hotplug_status);
+               if (state.hotplug_status)
+                       i9xx_hpd_irq_handler(display, state.hotplug_status);
 
-               i965_pipestat_irq_handler(display, iir, pipe_stats);
+               i965_pipestat_irq_handler(display, state.iir, state.pipe_stats);
        } while (0);
 
        pmu_irq_stats(dev_priv, IRQ_HANDLED);