]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/xe/ptl: Disable DCC on PTL
authorVinay Belgaumkar <vinay.belgaumkar@intel.com>
Sat, 24 Jan 2026 00:59:17 +0000 (16:59 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 26 Jan 2026 21:43:06 +0000 (16:43 -0500)
On PTL, the recommendation is to disable DCC(Duty Cycle Control) as
it may cause some regressions due to added latencies. Upcoming GuC
releases will disable DCC on PTL as well, but we need to force it in
KMD so that this behavior is propagated to older kernels.

v2: Update commit message (Rodrigo)
v3: Rebase
v4: Fix typo: s/propagted/propagated

Fixes: 5cdb71d3b0db ("drm/xe/ptl: Add GuC FW definition for PTL")
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Link: https://patch.msgid.link/20260124005917.398522-1-vinay.belgaumkar@intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
(cherry picked from commit 40ee63f5df2d5c6471b583df800aac89dc0502a4)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_guc_pc.c

index 54702a0fd05bedb309cd6e2d0c6841999ebcac4d..5e5495a39a3c9bdc00642c6e97d2f3ce1c160dfc 100644 (file)
@@ -1198,6 +1198,36 @@ int xe_guc_pc_set_power_profile(struct xe_guc_pc *pc, const char *buf)
        return ret;
 }
 
+static int pc_action_set_dcc(struct xe_guc_pc *pc, bool enable)
+{
+       int ret;
+
+       ret = pc_action_set_param(pc,
+                                 SLPC_PARAM_TASK_ENABLE_DCC,
+                                 enable);
+       if (!ret)
+               return pc_action_set_param(pc,
+                                          SLPC_PARAM_TASK_DISABLE_DCC,
+                                          !enable);
+       else
+               return ret;
+}
+
+static int pc_modify_defaults(struct xe_guc_pc *pc)
+{
+       struct xe_device *xe = pc_to_xe(pc);
+       struct xe_gt *gt = pc_to_gt(pc);
+       int ret = 0;
+
+       if (xe->info.platform == XE_PANTHERLAKE) {
+               ret = pc_action_set_dcc(pc, false);
+               if (unlikely(ret))
+                       xe_gt_err(gt, "Failed to modify DCC default: %pe\n", ERR_PTR(ret));
+       }
+
+       return ret;
+}
+
 /**
  * xe_guc_pc_start - Start GuC's Power Conservation component
  * @pc: Xe_GuC_PC instance
@@ -1249,6 +1279,10 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
                           ktime_ms_delta(ktime_get(), earlier));
        }
 
+       ret = pc_modify_defaults(pc);
+       if (ret)
+               return ret;
+
        ret = pc_init_freqs(pc);
        if (ret)
                return ret;