backport: re PR target/64882 (ICE on valid code at -O3 with -g enabled in simplify_su...

	Backport from mainline
	2015-01-31  Uros Bizjak  <ubizjak@gmail.com>

        PR target/64882
	* config/i386/predicates.md (address_no_seg_operand): Reject
	non-CONST_INT_P operands in invalid mode.

	Backport from mainline
	2015-01-31  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*prefetch_prefetchw1): Remove mode of
	address_operand 0.  Rename from *prefetch_prefetchwt1_<mode>.
	* config/i386/predicates.md (address_no_seg_operand): Call
	address_operand with VOIDmode.
	(vsib_address_operand): Ditto.

testsuite/ChangeLog:

	Backport from mainline
	2015-01-31  Uros Bizjak  <ubizjak@gmail.com>

        PR target/64882
	* gcc.dg/torture/pr64882.c: New test.

From-SVN: r220415

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6243963f4966f0cd736dd134cb38288360d39fe7..db84437bb64fd875ef17731d18739854cbbc9a8d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,21 @@
+2015-02-04  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline
+       2015-01-31  Uros Bizjak  <ubizjak@gmail.com>
+
+        PR target/64882
+       * config/i386/predicates.md (address_no_seg_operand): Reject
+       non-CONST_INT_P operands in invalid mode.
+
+       Backport from mainline
+       2015-01-31  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*prefetch_prefetchw1): Remove mode of
+       address_operand 0.  Rename from *prefetch_prefetchwt1_<mode>.
+       * config/i386/predicates.md (address_no_seg_operand): Call
+       address_operand with VOIDmode.
+       (vsib_address_operand): Ditto.
+
 2015-02-01  H.J. Lu  <hongjiu.lu@intel.com>
 
        Backported from mainline

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 79e2301117c04b298276a0e6c20f32f04e795ed3..2f76305d23e2e7a929fef48128a41cfe768fc9bc 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -17623,8 +17623,8 @@
        (symbol_ref "memory_address_length (operands[0], false)"))
    (set_attr "memory" "none")])
 
-(define_insn "*prefetch_prefetchwt1_<mode>"
-  [(prefetch (match_operand:P 0 "address_operand" "p")
+(define_insn "*prefetch_prefetchwt1"
+  [(prefetch (match_operand 0 "address_operand" "p")
             (const_int 1)
             (const_int 2))]
   "TARGET_PREFETCHWT1"

diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 2ef1384246ee076c9f44fd3473420e98b517ff6f..4ba2e6fbbca94327ee4be32e3eafcb73a9000df3 100644 (file)
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -968,11 +968,16 @@
 ;; a segment override.  Defined as a special predicate to allow
 ;; mode-less const_int operands pass to address_operand.
 (define_special_predicate "address_no_seg_operand"
-  (match_operand 0 "address_operand")
+  (match_test "address_operand (op, VOIDmode)")
 {
   struct ix86_address parts;
   int ok;
 
+  if (!CONST_INT_P (op)
+      && mode != VOIDmode
+      && GET_MODE (op) != mode)
+    return false;
+
   ok = ix86_decompose_address (op, &parts);
   gcc_assert (ok);
   return parts.seg == SEG_DEFAULT;
@@ -981,7 +986,7 @@
 ;; Return true if op if a valid base register, displacement or
 ;; sum of base register and displacement for VSIB addressing.
 (define_predicate "vsib_address_operand"
-  (match_operand 0 "address_operand")
+  (match_test "address_operand (op, VOIDmode)")
 {
   struct ix86_address parts;
   int ok;

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6a61b2efac215558d92a4ac3e553e5be41b03be2..a5b2b2a43c4acdf18897578ab3f293f5fa9d4fbe 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2015-02-04  Uros Bizjak  <ubizjak@gmail.com>
+
+       Backport from mainline
+       2015-01-31  Uros Bizjak  <ubizjak@gmail.com>
+
+        PR target/64882
+       * gcc.dg/torture/pr64882.c: New test.
+
 2015-02-01  H.J. Lu  <hongjiu.lu@intel.com>
 
        Backported from mainline