endif
enddef
+# Set the filetype of a *.v file to Verilog, V or Cog based on the first 200
+# lines.
+export def FTv()
+ if did_filetype()
+ # ":setf" will do nothing, bail out early
+ return
+ endif
+
+ for line in getline(1, 200)
+ if line[0] =~ '^\s*/'
+ # skip comment line
+ continue
+ endif
+
+ # Verilog: line ends with ';' followed by an optional variable number of
+ # spaces and an optional start of a comment.
+ # Example: " b <= a + 1; // Add 1".
+ if line =~ ';\(\s*\)\?\(/.*\)\?$'
+ setf verilog
+ return
+ endif
+
+ # Coq: line ends with a '.' followed by an optional variable number of
+ # spaces and an optional start of a comment.
+ # Example: "Definition x := 10. (*".
+ if line =~ '\.\(\s*\)\?\((\*.*\)\?$'
+ setf coq
+ return
+ endif
+ endfor
+
+ # No line matched, fall back to "v".
+ setf v
+enddef
+
# Uncomment this line to check for compilation errors early
# defcompile
" Vagrant (uses Ruby syntax)
au BufNewFile,BufRead Vagrantfile setf ruby
-" Verilog HDL
-au BufNewFile,BufRead *.v setf verilog
+" Verilog HDL, V or Coq
+au BufNewFile,BufRead *.v call dist#ft#FTv()
" Verilog-AMS HDL
au BufNewFile,BufRead *.va,*.vams setf verilogams
\ 'vdmrt': ['file.vdmrt'],
\ 'vdmsl': ['file.vdm', 'file.vdmsl'],
\ 'vera': ['file.vr', 'file.vri', 'file.vrh'],
- \ 'verilog': ['file.v'],
\ 'verilogams': ['file.va', 'file.vams'],
\ 'vgrindefs': ['vgrindefs'],
\ 'vhdl': ['file.hdl', 'file.vhd', 'file.vhdl', 'file.vbe', 'file.vst', 'file.vhdl_123', 'file.vho', 'some.vhdl_1', 'some.vhdl_1-file'],
filetype off
endfunc
+func Test_v_file()
+ filetype on
+
+ call writefile(['module tb; // Looks like a Verilog'], 'Xfile.v', 'D')
+ split Xfile.v
+ call assert_equal('verilog', &filetype)
+ bwipe!
+
+ call writefile(['module main'], 'Xfile.v')
+ split Xfile.v
+ call assert_equal('v', &filetype)
+ bwipe!
+
+ call writefile(['Definition x := 10. (*'], 'Xfile.v')
+ split Xfile.v
+ call assert_equal('coq', &filetype)
+ bwipe!
+
+ filetype off
+endfunc
+
func Test_xpm_file()
filetype on