x86: Update __x86_shared_non_temporal_threshold

__x86_shared_non_temporal_threshold was set to 6 times of per-core
shared cache size, based on the large memcpy micro benchmark in glibc
on a 8-core processor.  For a processor with more than 8 cores, the
threshold is too low.  Set __x86_shared_non_temporal_threshold to the
3/4 of the total shared cache size so that it is unchanged on 8-core
processors.  On processors with less than 8 cores, the threshold is
lower.

	* sysdeps/x86/cacheinfo.c (__x86_shared_non_temporal_threshold):
	Set to the 3/4 of the total shared cache size.

diff --git a/ChangeLog b/ChangeLog
index 3ac07f05178677bc8690bab957785f4325a16d10..a97f09d3dafb6559d9edd5ef2dcde4ddad1164b5 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2017-06-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * sysdeps/x86/cacheinfo.c (__x86_shared_non_temporal_threshold):
+       Set to the 3/4 of the total shared cache size.
+
 2017-06-02  Rical Jasan  <ricaljasan@pacific.net>
 
        * manual/errno.texi: Remove redundant error strings.

diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c
index 12ffeef5b53db0e39405c01e087460352a3353d3..f66f2b86e0f1b7caba352db2a76db0336fe9d764 100644 (file)
--- a/sysdeps/x86/cacheinfo.c
+++ b/sysdeps/x86/cacheinfo.c
@@ -767,8 +767,10 @@ intel_bug_no_cache_info:
 
   /* The large memcpy micro benchmark in glibc shows that 6 times of
      shared cache size is the approximate value above which non-temporal
-     store becomes faster.  */
-  __x86_shared_non_temporal_threshold = __x86_shared_cache_size * 6;
+     store becomes faster on a 8-core processor.  This is the 3/4 of the
+     total shared cache size.  */
+  __x86_shared_non_temporal_threshold
+    = __x86_shared_cache_size * threads * 3 / 4;
 }
 
 #endif