arm64: dts: hi3660: Add property for fixing CPUIdle

During CPU low power modes, ETM components will lose their context.  Add
the "arm,coresight-loses-context-with-cpu" property to ETM nodes to save
and restore ETM context for CPU idle states.

Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
index 79a55a0fa2f1a3cb58a921691146c8ef7e2bcc1a..4c6a075908d1f8e3b9bba7cf9f0a2220819ea188 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
@@ -17,6 +17,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu0>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {
@@ -34,6 +35,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu1>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {
@@ -51,6 +53,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu2>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {
@@ -68,6 +71,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu3>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {
@@ -160,6 +164,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu4>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {
@@ -177,6 +182,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu5>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {
@@ -194,6 +200,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu6>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {
@@ -211,6 +218,7 @@
                        clocks = <&crg_ctrl HI3660_PCLK>;
                        clock-names = "apb_pclk";
                        cpu = <&cpu7>;
+                       arm,coresight-loses-context-with-cpu;
 
                        out-ports {
                                port {