]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
mtd: spi-nor: winbond: Add support for W25Q01NWxxIQ chips
authorMiquel Raynal <miquel.raynal@bootlin.com>
Wed, 5 Nov 2025 17:27:00 +0000 (18:27 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 8 Jan 2026 09:14:43 +0000 (10:14 +0100)
commit aee8c4d9d48d661624d72de670ebe5c6b5687842 upstream.

This chip must be described as none of the block protection information
are discoverable. This chip supports 4 bits plus the top/bottom
addressing capability to identify the protected blocks.

Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Pratyush Yadav <pratyush@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/mtd/spi-nor/winbond.c

index 9f7ce5763e7104a5db9c503ffb41d45b5d393598..9aaa3ad13ed733322d316b671784b464b77f5264 100644 (file)
@@ -254,6 +254,10 @@ static const struct flash_info winbond_nor_parts[] = {
                .id = SNOR_ID(0xef, 0x80, 0x20),
                .name = "w25q512nwm",
                .otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+       }, {
+               /* W25Q01NWxxIQ */
+               .id = SNOR_ID(0xef, 0x60, 0x21),
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
        },
 };