]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/vrr: Add function to reset DC balance accumulated params
authorMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Tue, 23 Dec 2025 10:45:31 +0000 (16:15 +0530)
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Tue, 30 Dec 2025 04:32:20 +0000 (10:02 +0530)
Add function which resets all accumulated DC Balance parameters
whenever adaptive mode of VRR goes off. This helps to give a
fresh start when VRR is re-enabled.

--v2:
- Typo, change crtc_state to old_crtc_state. (Ankit)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-10-mitulkumar.ajitkumar.golani@intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_vrr.c
drivers/gpu/drm/i915/display/intel_vrr.h

index a7e71ad8a88608c7739cbb029b451028088df1dd..35a97d6bc059b05f7749cd723647432722efc1cb 100644 (file)
@@ -1158,6 +1158,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 
        if (intel_crtc_vrr_disabling(state, crtc)) {
                intel_vrr_disable(old_crtc_state);
+               intel_vrr_dcb_reset(old_crtc_state, crtc);
                intel_crtc_update_active_timings(old_crtc_state, false);
        }
 
index dbfe56e8973dc7a01af80d04a747b81279a62a8d..c3a8161fb8e15b1762f37f95c5195db1965311c6 100644 (file)
@@ -646,6 +646,19 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
                               EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start));
 }
 
+void
+intel_vrr_dcb_reset(const struct intel_crtc_state *old_crtc_state,
+                   struct intel_crtc *crtc)
+{
+       struct intel_display *display = to_intel_display(old_crtc_state);
+       enum pipe pipe = crtc->pipe;
+
+       if (!old_crtc_state->vrr.dc_balance.enable)
+               return;
+
+       intel_de_write(display, PIPEDMC_DCB_BALANCE_RESET(pipe), 0);
+}
+
 void intel_vrr_send_push(struct intel_dsb *dsb,
                         const struct intel_crtc_state *crtc_state)
 {
index 66fb9ad846f25f2271943bd97663ceb2f438d305..d40ed5504180247621b3c6e3bccde12838329834 100644 (file)
@@ -11,6 +11,7 @@
 struct drm_connector_state;
 struct intel_atomic_state;
 struct intel_connector;
+struct intel_crtc;
 struct intel_crtc_state;
 struct intel_dsb;
 struct intel_display;
@@ -39,6 +40,8 @@ bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state);
 void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state);
 void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state);
 void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
+void intel_vrr_dcb_reset(const struct intel_crtc_state *old_crtc_state,
+                        struct intel_crtc *crtc);
 bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
 int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state);
 int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state);