]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ASoC: qcom: qdsp6: q6asm-dai: set 10 ms period and buffer alignment.
authorSrinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Thu, 23 Oct 2025 10:24:27 +0000 (11:24 +0100)
committerMark Brown <broonie@kernel.org>
Wed, 5 Nov 2025 13:28:20 +0000 (13:28 +0000)
DSP expects the periods to be aligned to fragment sizes, currently
setting up to hw constriants on periods bytes is not going to work
correctly as we can endup with periods sizes aligned to 32 bytes however
not aligned to fragment size.

Update the constriants to use fragment size, and also set at step of
10ms for period size to accommodate DSP requirements of 10ms latency.

Fixes: 2a9e92d371db ("ASoC: qdsp6: q6asm: Add q6asm dai driver")
Cc: Stable@vger.kernel.org
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # RB5, RB3
Link: https://patch.msgid.link/20251023102444.88158-4-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/qcom/qdsp6/q6asm-dai.c

index b616ce316d2f137fe3ea1346281e1274576f7d1a..e8129510a734cadee663cd9eb58c86bb4e14acad 100644 (file)
@@ -403,13 +403,13 @@ static int q6asm_dai_open(struct snd_soc_component *component,
        }
 
        ret = snd_pcm_hw_constraint_step(runtime, 0,
-               SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
+               SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 480);
        if (ret < 0) {
                dev_err(dev, "constraint for period bytes step ret = %d\n",
                                                                ret);
        }
        ret = snd_pcm_hw_constraint_step(runtime, 0,
-               SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
+               SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 480);
        if (ret < 0) {
                dev_err(dev, "constraint for buffer bytes step ret = %d\n",
                                                                ret);