]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ASoC: fsl_utils: Add function to constrain rates
authorChancel Liu <chancel.liu@nxp.com>
Tue, 26 Nov 2024 11:54:37 +0000 (20:54 +0900)
committerMark Brown <broonie@kernel.org>
Mon, 9 Dec 2024 13:11:09 +0000 (13:11 +0000)
Platforms like i.MX93/91 only have one audio PLL. Some sample rates are
not supported. Add common function to constrain rates according to
different clock sources.

Signed-off-by: Chancel Liu <chancel.liu@nxp.com>
Link: https://patch.msgid.link/20241126115440.3929061-2-chancel.liu@nxp.com
Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/fsl/fsl_utils.c
sound/soc/fsl/fsl_utils.h

index a5ab27c2f711c849efb8a7e4668007ce8ac0f596..d69a6b9795bf308863e3f545334bfe1846d97477 100644 (file)
@@ -152,6 +152,51 @@ void fsl_asoc_reparent_pll_clocks(struct device *dev, struct clk *clk,
 }
 EXPORT_SYMBOL(fsl_asoc_reparent_pll_clocks);
 
+/**
+ * fsl_asoc_constrain_rates - constrain rates according to clocks
+ *
+ * @target_constr: target constraint
+ * @original_constr: original constraint
+ * @pll8k_clk: PLL clock pointer for 8kHz
+ * @pll11k_clk: PLL clock pointer for 11kHz
+ * @ext_clk: External clock pointer
+ * @target_rates: target rates array
+ *
+ * This function constrain rates according to clocks
+ */
+void fsl_asoc_constrain_rates(struct snd_pcm_hw_constraint_list *target_constr,
+                             const struct snd_pcm_hw_constraint_list *original_constr,
+                             struct clk *pll8k_clk, struct clk *pll11k_clk,
+                             struct clk *ext_clk, int *target_rates)
+{
+       int i, j, k = 0;
+       u64 clk_rate[3];
+
+       *target_constr = *original_constr;
+       if (pll8k_clk || pll11k_clk || ext_clk) {
+               target_constr->list = target_rates;
+               target_constr->count = 0;
+               for (i = 0; i < original_constr->count; i++) {
+                       clk_rate[0] = clk_get_rate(pll8k_clk);
+                       clk_rate[1] = clk_get_rate(pll11k_clk);
+                       clk_rate[2] = clk_get_rate(ext_clk);
+                       for (j = 0; j < 3; j++) {
+                               if (clk_rate[j] != 0 &&
+                                   do_div(clk_rate[j], original_constr->list[i]) == 0) {
+                                       target_rates[k++] = original_constr->list[i];
+                                       target_constr->count++;
+                                       break;
+                               }
+                       }
+               }
+
+               /* protection for if there is no proper rate found*/
+               if (!target_constr->count)
+                       *target_constr = *original_constr;
+       }
+}
+EXPORT_SYMBOL(fsl_asoc_constrain_rates);
+
 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
 MODULE_DESCRIPTION("Freescale ASoC utility code");
 MODULE_LICENSE("GPL v2");
index 4d5f3d93bc813913eb33c5842b2fdd266f8df64a..21b25a11ecdaeea9a3a95d4bd1c33af1b5c1d286 100644 (file)
@@ -26,4 +26,9 @@ void fsl_asoc_get_pll_clocks(struct device *dev, struct clk **pll8k_clk,
 void fsl_asoc_reparent_pll_clocks(struct device *dev, struct clk *clk,
                                  struct clk *pll8k_clk,
                                  struct clk *pll11k_clk, u64 ratio);
+
+void fsl_asoc_constrain_rates(struct snd_pcm_hw_constraint_list *target_constr,
+                             const struct snd_pcm_hw_constraint_list *original_constr,
+                             struct clk *pll8k_clk, struct clk *pll11k_clk,
+                             struct clk *ext_clk, int *target_rates);
 #endif /* _FSL_UTILS_H */