+2015-02-20 Uros Bizjak <ubizjak@gmail.com>
+
+ Backport from mainline
+ 2013-09-08 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * ira.c (update_equiv_regs): Only call set_paradoxical_subreg
+ for non-debug insns.
+ * lra.c (new_insn_reg): Take the containing insn as a parameter.
+ Only modify lra_reg_info[].biggest_mode if it's non-debug insn.
+ (collect_non_operand_hard_regs, add_regs_to_insn_regno_info): Update
+ accordingly.
+
2015-02-17 Ilya Tocar <ilya.tocar@intel.com>
Backported from mainline
Backport from mainline
2015-01-31 Uros Bizjak <ubizjak@gmail.com>
- PR target/64882
+ PR target/64882
* config/i386/predicates.md (address_no_seg_operand): Reject
non-CONST_INT_P operands in invalid mode.
2014-12-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
- 2014-09-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+ 2014-09-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (XVCVSXDDP_SCALE): New
built-in definition.
(vec_mul): Likewise.
Backport from mainline
- 2014-08-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+ 2014-08-28 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.h (vec_xl): New #define.
(vec_xst): Likewise.
(vsx_xxspltd_<mode>): New insn.
Backport from mainline
- 2014-08-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+ 2014-08-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.h (vec_cpsgn): New #define.
(vec_mergee): Likewise.
vec_any_ne, vec_mergee, vec_mergeo, vec_packsu, and vec_cntlz.
Backport from mainline
- 2014-07-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+ 2014-07-20 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.md (unspec enum): Fix typo in UNSPEC_VSLDOI.
(altivec_vsldoi_<mode>): Likewise.
for immediate.
2014-11-19 Felix Yang <felix.yang@huawei.com>
- Shanyao Chen <chenshanyao@huawei.com>
+ Shanyao Chen <chenshanyao@huawei.com>
PR target/59593
* config/arm/arm.md (define_attr "arch"): Add v6t2.
Backport from mainline
2014-06-20 Julian Brown <julian@codesourcery.com>
- Chung-Lin Tang <cltang@codesourcery.com>
+ Chung-Lin Tang <cltang@codesourcery.com>
* config/arm/arm.c (arm_output_mi_thunk): Fix offset for
TARGET_THUMB1_ONLY. Add comments.
prevent access beyond allocated memory for paradoxical memory subreg. */
FOR_EACH_BB (bb)
FOR_BB_INSNS (bb, insn)
- {
- if (! INSN_P (insn))
- continue;
- for_each_rtx (&insn, set_paradoxical_subreg, (void *)pdx_subregs);
- }
+ if (NONDEBUG_INSN_P (insn))
+ for_each_rtx (&insn, set_paradoxical_subreg, (void *) pdx_subregs);
/* Scan the insns and find which registers have equivalences. Do this
in a separate scan of the insns because (due to -fcse-follow-jumps)
= create_alloc_pool ("insn regs", sizeof (struct lra_insn_reg), 100);
}
-/* Create LRA insn related info about referenced REGNO with TYPE
- (in/out/inout), biggest reference mode MODE, flag that it is
+/* Create LRA insn related info about a reference to REGNO in INSN with
+ TYPE (in/out/inout), biggest reference mode MODE, flag that it is
reference through subreg (SUBREG_P), flag that is early clobbered
in the insn (EARLY_CLOBBER), and reference to the next insn reg
info (NEXT). */
static struct lra_insn_reg *
-new_insn_reg (int regno, enum op_type type, enum machine_mode mode,
+new_insn_reg (rtx insn, int regno, enum op_type type, enum machine_mode mode,
bool subreg_p, bool early_clobber, struct lra_insn_reg *next)
{
struct lra_insn_reg *ir;
ir = (struct lra_insn_reg *) pool_alloc (insn_reg_pool);
ir->type = type;
ir->biggest_mode = mode;
- if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (lra_reg_info[regno].biggest_mode))
+ if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (lra_reg_info[regno].biggest_mode)
+ && NONDEBUG_INSN_P (insn))
lra_reg_info[regno].biggest_mode = mode;
ir->subreg_p = subreg_p;
ir->early_clobber = early_clobber;
&& ! (FIRST_STACK_REG <= regno
&& regno <= LAST_STACK_REG));
#endif
- list = new_insn_reg (regno, type, mode, subreg_p,
+ list = new_insn_reg (data->insn, regno, type, mode, subreg_p,
early_clobber, list);
}
}
expand_reg_info ();
if (bitmap_set_bit (&lra_reg_info[regno].insn_bitmap, uid))
{
- data->regs = new_insn_reg (regno, type, mode, subreg_p,
+ data->regs = new_insn_reg (data->insn, regno, type, mode, subreg_p,
early_clobber, data->regs);
return;
}
if (curr->subreg_p != subreg_p || curr->biggest_mode != mode)
/* The info can not be integrated into the found
structure. */
- data->regs = new_insn_reg (regno, type, mode, subreg_p,
- early_clobber, data->regs);
+ data->regs = new_insn_reg (data->insn, regno, type, mode,
+ subreg_p, early_clobber,
+ data->regs);
else
{
if (curr->type != type)
+2015-02-20 Uros Bizjak <ubizjak@gmail.com>
+
+ Backport from mainline
+ 2013-09-08 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * g++.dg/debug/ra1.C: New test.
+
2015-02-17 Sandra Loosemore <sandra@codesourcery.com>
Backported from mainline
Backport from mainline
2015-01-31 Uros Bizjak <ubizjak@gmail.com>
- PR target/64882
+ PR target/64882
* gcc.dg/torture/pr64882.c: New test.
2015-02-01 Jakub Jelinek <jakub@redhat.com>
--- /dev/null
+/* { dg-options "-fcompare-debug" } */
+
+enum signop { SIGNED, UNSIGNED };
+enum tree_code { FOO, BAR };
+enum tree_code_class { tcc_type, tcc_other };
+extern enum tree_code_class tree_code_type[];
+
+struct tree_base {
+ enum tree_code code : 16;
+ unsigned unsigned_flag : 1;
+};
+
+struct tree_def {
+ tree_base base;
+ struct {
+ int precision;
+ } type_common;
+};
+
+typedef tree_def *tree;
+
+struct storage_ref
+{
+ storage_ref (const long *, unsigned int, unsigned int);
+
+ const long *val;
+ unsigned int len;
+ unsigned int precision;
+};
+
+inline storage_ref::storage_ref (const long *val_in,
+ unsigned int len_in,
+ unsigned int precision_in)
+ : val (val_in), len (len_in), precision (precision_in)
+{
+}
+
+struct hwi_with_prec
+{
+ long val;
+ unsigned int precision;
+ signop sgn;
+};
+
+inline storage_ref
+decompose (long *scratch, unsigned int precision,
+ const hwi_with_prec &x)
+{
+ scratch[0] = x.val;
+ if (x.sgn == SIGNED || x.val >= 0 || precision <= sizeof (long) * 8)
+ return storage_ref (scratch, 1, precision);
+ scratch[1] = 0;
+ return storage_ref (scratch, 2, precision);
+}
+
+extern void tree_class_check_failed (int) __attribute__ ((__noreturn__));
+
+inline tree
+tree_class_check (tree t, const enum tree_code_class cls, int x)
+{
+ if (tree_code_type[t->base.code] != cls)
+ tree_class_check_failed (x);
+ return t;
+}
+
+tree wide_int_to_tree (tree, const storage_ref &);
+
+tree
+build_int_cstu (tree type, unsigned long val)
+{
+ hwi_with_prec x;
+ x.val = val;
+ x.precision = tree_class_check (type, tcc_type, 1)->type_common.precision;
+ x.sgn = (signop) tree_class_check (type, tcc_type, 2)->base.unsigned_flag;
+ long scratch[2];
+ return wide_int_to_tree (type, decompose (scratch, x.precision, x));
+}
projects / thirdparty / gcc.git / commitdiff
