riscv: hweight: Use riscv_has_extension_likely

Use riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB,
replacing the use of asm goto with ALTERNATIVE.

The "likely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("j %l[legacy]", "nop", ...).

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Link: https://patch.msgid.link/20251020-riscv-altn-helper-wip-v4-3-ef941c87669a@iscas.ac.cn
Signed-off-by: Paul Walmsley <pjw@kernel.org>

diff --git a/arch/riscv/include/asm/arch_hweight.h b/arch/riscv/include/asm/arch_hweight.h
index 0e7cdbbec8efd3c293da2fa96a8c6d0a93faf56f..f3c0831beefc61ab4483193279d9a0bdfc18eb90 100644 (file)
--- a/arch/riscv/include/asm/arch_hweight.h
+++ b/arch/riscv/include/asm/arch_hweight.h
@@ -19,10 +19,10 @@
 
 static __always_inline unsigned int __arch_hweight32(unsigned int w)
 {
-#if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)
-       asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
-                                     RISCV_ISA_EXT_ZBB, 1)
-                         : : : : legacy);
+       if (!(IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+             IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+             riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)))
+               return __sw_hweight32(w);
 
        asm (".option push\n"
             ".option arch,+zbb\n"
@@ -31,10 +31,6 @@ static __always_inline unsigned int __arch_hweight32(unsigned int w)
             : "=r" (w) : "r" (w) :);
 
        return w;
-
-legacy:
-#endif
-       return __sw_hweight32(w);
 }
 
 static inline unsigned int __arch_hweight16(unsigned int w)
@@ -50,10 +46,10 @@ static inline unsigned int __arch_hweight8(unsigned int w)
 #if BITS_PER_LONG == 64
 static __always_inline unsigned long __arch_hweight64(__u64 w)
 {
-#if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)
-       asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
-                                     RISCV_ISA_EXT_ZBB, 1)
-                         : : : : legacy);
+       if (!(IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+             IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+             riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)))
+               return __sw_hweight64(w);
 
        asm (".option push\n"
             ".option arch,+zbb\n"
@@ -62,10 +58,6 @@ static __always_inline unsigned long __arch_hweight64(__u64 w)
             : "=r" (w) : "r" (w) :);
 
        return w;
-
-legacy:
-#endif
-       return __sw_hweight64(w);
 }
 #else /* BITS_PER_LONG == 64 */
 static inline unsigned long __arch_hweight64(__u64 w)