powerpc: Fix VSX register number on __strncpy_power9 [BZ #29197]

__strncpy_power9 initializes VR 18 with zeroes to be used throughout the
code, including when zero-padding the destination string. However, the
v18 reference was mistakenly being used for stxv and stxvl, which take a
VSX vector as operand. The code ended up using the uninitialized VSR 18
register by mistake.

Both occurrences have been changed to use the proper VSX number for VR 18
(i.e. VSR 50).

Tested on powerpc, powerpc64 and powerpc64le.

Signed-off-by: Kewen Lin <linkw@gcc.gnu.org>
(cherry picked from commit 0218463dd8265ed937622f88ac68c7d984fe0cfc)

diff --git a/sysdeps/powerpc/powerpc64/le/power9/strncpy.S b/sysdeps/powerpc/powerpc64/le/power9/strncpy.S
index 291941c1e5c0eb4b36268e7fb03c42b3f081aaa8..5421525acee3ebfe87360e18f8519b8c7f0f0e52 100644 (file)
--- a/sysdeps/powerpc/powerpc64/le/power9/strncpy.S
+++ b/sysdeps/powerpc/powerpc64/le/power9/strncpy.S
@@ -352,7 +352,7 @@ L(zero_padding_loop):
        cmpldi  cr6,r5,16       /* Check if length was reached.  */
        ble     cr6,L(zero_padding_end)
 
-       stxv    v18,0(r11)
+       stxv    32+v18,0(r11)
        addi    r11,r11,16
        addi    r5,r5,-16
 
@@ -360,7 +360,7 @@ L(zero_padding_loop):
 
 L(zero_padding_end):
        sldi    r10,r5,56       /* stxvl wants size in top 8 bits  */
-       stxvl   v18,r11,r10     /* Partial store  */
+       stxvl   32+v18,r11,r10  /* Partial store  */
        blr
 
        .align  4