net: stmmac: rk: move speed GRF register offset to private data

Move the speed/clocking related GRF register offset into the driver
private data, convert rk_set_reg_speed() to use it and initialise this
member either from the corresponding member in struct rk_gmac_ops, or
the SoC specific initialisation function.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vmqmr-00000007VCV-3Cz8@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 96a1d6b60a35a842d92e96d0115c0c14e1d7ddf7..fce8cc3db4ee6bcc5e9d9c6f60361435802fb743 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -50,6 +50,8 @@ struct rk_gmac_ops {
        u16 gmac_phy_intf_sel_mask;
        u16 gmac_rmii_mode_mask;
 
+       u16 clock_grf_reg;
+
        bool gmac_grf_reg_in_php;
        bool php_grf_required;
        bool regs_valid;
@@ -100,6 +102,8 @@ struct rk_priv_data {
        u16 gmac_grf_reg;
        u16 gmac_phy_intf_sel_mask;
        u16 gmac_rmii_mode_mask;
+
+       u16 clock_grf_reg;
 };
 
 #define GMAC_CLK_DIV1_125M             0
@@ -139,10 +143,14 @@ static int rk_write_gmac_grf_reg(struct rk_priv_data *bsp_priv, u32 val)
        return regmap_write(regmap, bsp_priv->gmac_grf_reg, val);
 }
 
+static int rk_write_clock_grf_reg(struct rk_priv_data *bsp_priv, u32 val)
+{
+       return regmap_write(bsp_priv->grf, bsp_priv->clock_grf_reg, val);
+}
+
 static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
                            const struct rk_reg_speed_data *rsd,
-                           unsigned int reg, phy_interface_t interface,
-                           int speed)
+                           phy_interface_t interface, int speed)
 {
        unsigned int val;
 
@@ -178,7 +186,7 @@ static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
                return -EINVAL;
        }
 
-       regmap_write(bsp_priv->grf, reg, val);
+       rk_write_clock_grf_reg(bsp_priv, val);
 
        return 0;
 
@@ -373,7 +381,7 @@ static int rk3128_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rk3128_reg_speed_data,
-                               RK3128_GRF_MAC_CON1, interface, speed);
+                               interface, speed);
 }
 
 static const struct rk_gmac_ops rk3128_ops = {
@@ -384,6 +392,8 @@ static const struct rk_gmac_ops rk3128_ops = {
        .gmac_grf_reg = RK3128_GRF_MAC_CON1,
        .gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
        .gmac_rmii_mode_mask = BIT_U16(14),
+
+       .clock_grf_reg = RK3128_GRF_MAC_CON1,
 };
 
 #define RK3228_GRF_MAC_CON0    0x0900
@@ -440,7 +450,7 @@ static int rk3228_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rk3228_reg_speed_data,
-                               RK3228_GRF_MAC_CON1, interface, speed);
+                               interface, speed);
 }
 
 static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv)
@@ -462,6 +472,7 @@ static const struct rk_gmac_ops rk3228_ops = {
        .gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
        .gmac_rmii_mode_mask = BIT_U16(10),
 
+       .clock_grf_reg = RK3228_GRF_MAC_CON1,
 };
 
 #define RK3288_GRF_SOC_CON1    0x0248
@@ -509,7 +520,7 @@ static int rk3288_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rk3288_reg_speed_data,
-                               RK3288_GRF_SOC_CON1, interface, speed);
+                               interface, speed);
 }
 
 static const struct rk_gmac_ops rk3288_ops = {
@@ -520,6 +531,8 @@ static const struct rk_gmac_ops rk3288_ops = {
        .gmac_grf_reg = RK3288_GRF_SOC_CON1,
        .gmac_phy_intf_sel_mask = GENMASK_U16(8, 6),
        .gmac_rmii_mode_mask = BIT_U16(14),
+
+       .clock_grf_reg = RK3288_GRF_SOC_CON1,
 };
 
 #define RK3308_GRF_MAC_CON0            0x04a0
@@ -543,7 +556,7 @@ static int rk3308_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rk3308_reg_speed_data,
-                               RK3308_GRF_MAC_CON0, interface, speed);
+                               interface, speed);
 }
 
 static const struct rk_gmac_ops rk3308_ops = {
@@ -552,6 +565,8 @@ static const struct rk_gmac_ops rk3308_ops = {
 
        .gmac_grf_reg = RK3308_GRF_MAC_CON0,
        .gmac_phy_intf_sel_mask = GENMASK_U16(4, 2),
+
+       .clock_grf_reg = RK3308_GRF_MAC_CON0,
 };
 
 #define RK3328_GRF_MAC_CON0    0x0900
@@ -582,10 +597,12 @@ static int rk3328_init(struct rk_priv_data *bsp_priv)
        switch (bsp_priv->id) {
        case 0: /* gmac2io */
                bsp_priv->gmac_grf_reg = RK3328_GRF_MAC_CON1;
+               bsp_priv->clock_grf_reg = RK3328_GRF_MAC_CON1;
                return 0;
 
        case 1: /* gmac2phy */
                bsp_priv->gmac_grf_reg = RK3328_GRF_MAC_CON2;
+               bsp_priv->clock_grf_reg = RK3328_GRF_MAC_CON2;
                return 0;
 
        default:
@@ -620,11 +637,7 @@ static const struct rk_reg_speed_data rk3328_reg_speed_data = {
 static int rk3328_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
-       unsigned int reg;
-
-       reg = bsp_priv->id ? RK3328_GRF_MAC_CON2 : RK3328_GRF_MAC_CON1;
-
-       return rk_set_reg_speed(bsp_priv, &rk3328_reg_speed_data, reg,
+       return rk_set_reg_speed(bsp_priv, &rk3328_reg_speed_data,
                                interface, speed);
 }
 
@@ -700,7 +713,7 @@ static int rk3366_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rk3366_reg_speed_data,
-                               RK3366_GRF_SOC_CON6, interface, speed);
+                               interface, speed);
 }
 
 static const struct rk_gmac_ops rk3366_ops = {
@@ -711,6 +724,8 @@ static const struct rk_gmac_ops rk3366_ops = {
        .gmac_grf_reg = RK3366_GRF_SOC_CON6,
        .gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
        .gmac_rmii_mode_mask = BIT_U16(6),
+
+       .clock_grf_reg = RK3366_GRF_SOC_CON6,
 };
 
 #define RK3368_GRF_SOC_CON15   0x043c
@@ -758,7 +773,7 @@ static int rk3368_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rk3368_reg_speed_data,
-                               RK3368_GRF_SOC_CON15, interface, speed);
+                               interface, speed);
 }
 
 static const struct rk_gmac_ops rk3368_ops = {
@@ -769,6 +784,8 @@ static const struct rk_gmac_ops rk3368_ops = {
        .gmac_grf_reg = RK3368_GRF_SOC_CON15,
        .gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
        .gmac_rmii_mode_mask = BIT_U16(6),
+
+       .clock_grf_reg = RK3368_GRF_SOC_CON15,
 };
 
 #define RK3399_GRF_SOC_CON5    0xc214
@@ -816,7 +833,7 @@ static int rk3399_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rk3399_reg_speed_data,
-                               RK3399_GRF_SOC_CON5, interface, speed);
+                               interface, speed);
 }
 
 static const struct rk_gmac_ops rk3399_ops = {
@@ -827,6 +844,8 @@ static const struct rk_gmac_ops rk3399_ops = {
        .gmac_grf_reg = RK3399_GRF_SOC_CON5,
        .gmac_phy_intf_sel_mask = GENMASK_U16(11, 9),
        .gmac_rmii_mode_mask = BIT_U16(6),
+
+       .clock_grf_reg = RK3399_GRF_SOC_CON5,
 };
 
 #define RK3506_GRF_SOC_CON8            0x0020
@@ -843,6 +862,22 @@ static const struct rk_gmac_ops rk3399_ops = {
 #define RK3506_GMAC_CLK_RMII_GATE      GRF_BIT(2)
 #define RK3506_GMAC_CLK_RMII_NOGATE    GRF_CLR_BIT(2)
 
+static int rk3506_init(struct rk_priv_data *bsp_priv)
+{
+       switch (bsp_priv->id) {
+       case 0:
+               bsp_priv->clock_grf_reg = RK3506_GRF_SOC_CON8;
+               return 0;
+
+       case 1:
+               bsp_priv->clock_grf_reg = RK3506_GRF_SOC_CON11;
+               return 0;
+
+       default:
+               return -EINVAL;
+       }
+}
+
 static void rk3506_set_to_rmii(struct rk_priv_data *bsp_priv)
 {
        unsigned int id = bsp_priv->id, offset;
@@ -859,11 +894,8 @@ static const struct rk_reg_speed_data rk3506_reg_speed_data = {
 static int rk3506_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
-       unsigned int id = bsp_priv->id, offset;
-
-       offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;
        return rk_set_reg_speed(bsp_priv, &rk3506_reg_speed_data,
-                               offset, interface, speed);
+                               interface, speed);
 }
 
 static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
@@ -881,6 +913,7 @@ static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,
 }
 
 static const struct rk_gmac_ops rk3506_ops = {
+       .init = rk3506_init,
        .set_to_rmii = rk3506_set_to_rmii,
        .set_speed = rk3506_set_speed,
        .set_clock_selection = rk3506_set_clock_selection,
@@ -925,6 +958,22 @@ static const struct rk_gmac_ops rk3506_ops = {
 #define RK3528_GMAC1_CLK_RMII_GATE     GRF_BIT(9)
 #define RK3528_GMAC1_CLK_RMII_NOGATE   GRF_CLR_BIT(9)
 
+static int rk3528_init(struct rk_priv_data *bsp_priv)
+{
+       switch (bsp_priv->id) {
+       case 0:
+               bsp_priv->clock_grf_reg = RK3528_VO_GRF_GMAC_CON;
+               return 0;
+
+       case 1:
+               bsp_priv->clock_grf_reg = RK3528_VPU_GRF_GMAC_CON5;
+               return 0;
+
+       default:
+               return -EINVAL;
+       }
+}
+
 static void rk3528_set_to_rgmii(struct rk_priv_data *bsp_priv,
                                int tx_delay, int rx_delay)
 {
@@ -967,17 +1016,13 @@ static int rk3528_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        const struct rk_reg_speed_data *rsd;
-       unsigned int reg;
 
-       if (bsp_priv->id == 1) {
+       if (bsp_priv->id == 1)
                rsd = &rk3528_gmac1_reg_speed_data;
-               reg = RK3528_VPU_GRF_GMAC_CON5;
-       } else {
+       else
                rsd = &rk3528_gmac0_reg_speed_data;
-               reg = RK3528_VO_GRF_GMAC_CON;
-       }
 
-       return rk_set_reg_speed(bsp_priv, rsd, reg, interface, speed);
+       return rk_set_reg_speed(bsp_priv, rsd, interface, speed);
 }
 
 static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv,
@@ -1009,6 +1054,7 @@ static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv)
 }
 
 static const struct rk_gmac_ops rk3528_ops = {
+       .init = rk3528_init,
        .set_to_rgmii = rk3528_set_to_rgmii,
        .set_to_rmii = rk3528_set_to_rmii,
        .set_speed = rk3528_set_speed,
@@ -1129,10 +1175,12 @@ static int rk3576_init(struct rk_priv_data *bsp_priv)
        switch (bsp_priv->id) {
        case 0:
                bsp_priv->gmac_grf_reg = RK3576_GRF_GMAC_CON0;
+               bsp_priv->clock_grf_reg = RK3576_GRF_GMAC_CON0;
                return 0;
 
        case 1:
                bsp_priv->gmac_grf_reg = RK3576_GRF_GMAC_CON1;
+               bsp_priv->clock_grf_reg = RK3576_GRF_GMAC_CON1;
                return 0;
 
        default:
@@ -1178,12 +1226,7 @@ static const struct rk_reg_speed_data rk3578_reg_speed_data = {
 static int rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv,
                                 phy_interface_t interface, int speed)
 {
-       unsigned int offset_con;
-
-       offset_con = bsp_priv->id == 1 ? RK3576_GRF_GMAC_CON1 :
-                                        RK3576_GRF_GMAC_CON0;
-
-       return rk_set_reg_speed(bsp_priv, &rk3578_reg_speed_data, offset_con,
+       return rk_set_reg_speed(bsp_priv, &rk3578_reg_speed_data,
                                interface, speed);
 }
 
@@ -1384,7 +1427,7 @@ static int rv1108_set_speed(struct rk_priv_data *bsp_priv,
                            phy_interface_t interface, int speed)
 {
        return rk_set_reg_speed(bsp_priv, &rv1108_reg_speed_data,
-                               RV1108_GRF_GMAC_CON0, interface, speed);
+                               interface, speed);
 }
 
 static const struct rk_gmac_ops rv1108_ops = {
@@ -1393,6 +1436,8 @@ static const struct rk_gmac_ops rv1108_ops = {
 
        .gmac_grf_reg = RV1108_GRF_GMAC_CON0,
        .gmac_phy_intf_sel_mask = GENMASK_U16(6, 4),
+
+       .clock_grf_reg = RV1108_GRF_GMAC_CON0,
 };
 
 #define RV1126_GRF_GMAC_CON0           0X0070
@@ -1675,6 +1720,9 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
        bsp_priv->gmac_phy_intf_sel_mask = ops->gmac_phy_intf_sel_mask;
        bsp_priv->gmac_rmii_mode_mask = ops->gmac_rmii_mode_mask;
 
+       /* Set the default clock control register related parameters */
+       bsp_priv->clock_grf_reg = ops->clock_grf_reg;
+
        if (ops->init) {
                ret = ops->init(bsp_priv);
                if (ret) {