re PR rtl-optimization/51821 (64bit > 32bit conversion produces incorrect results...

	PR rtl-optimization/51821
	* recog.c (peep2_find_free_register): Determine clobbered registers
	from insn pattern.

testsuite/ChangeLog:

	PR rtl-optimization/51821
	* gcc.dg/pr51821.c: New test.

From-SVN: r183198

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 46fcde4541803f8a3646d99fb3f9062a60743828..50e90c41636f8eba251c24eb77525c50f5275649 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2012-01-15  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR rtl-optimization/51821
+       * recog.c (peep2_find_free_register): Determine clobbered registers
+       from insn pattern.
+
 2012-01-12  Georg-Johann Lay  <avr@gjlay.de>
 
        Backport from mainline r183129
@@ -139,8 +145,7 @@
 
        PR target/51623
        * config/rs6000/rs6000.c (rs6000_assemble_integer): Don't call
-       unlikely_text_section_p.  Instead check for being in a code
-       section.
+       unlikely_text_section_p.  Instead check for being in a code section.
 
 2011-12-23  Richard Guenther  <rguenther@suse.de>
 

diff --git a/gcc/recog.c b/gcc/recog.c
index 8fb96a0ed837b015e1af79b9a95835b0268a6226..7faa0f08e7627f9c63a6c76d2fb414b424b32bc3 100644 (file)
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -3023,6 +3023,7 @@ peep2_find_free_register (int from, int to, const char *class_str,
   static int search_ofs;
   enum reg_class cl;
   HARD_REG_SET live;
+  df_ref *def_rec;
   int i;
 
   gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1);
@@ -3036,12 +3037,14 @@ peep2_find_free_register (int from, int to, const char *class_str,
 
   while (from != to)
     {
-      HARD_REG_SET this_live;
+      gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
+
+      /* Don't use registers set or clobbered by the insn.  */
+      for (def_rec = DF_INSN_DEFS (peep2_insn_data[from].insn);
+          *def_rec; def_rec++)
+       SET_HARD_REG_BIT (live, DF_REF_REGNO (*def_rec));
 
       from = peep2_buf_position (from + 1);
-      gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
-      REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before);
-      IOR_HARD_REG_SET (live, this_live);
     }
 
   cl = (class_str[0] == 'r' ? GENERAL_REGS

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9cd2815d78d4a72cfd2f4bebe16a4c7af5027a1d..ec2fc42f69d4b48d3573485017b786b6c6c2fc30 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-01-15  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR rtl-optimization/51821
+       * gcc.dg/pr51821.c: New test.
+
 2012-01-14  Tobias Burnus  <burnus@net-b.de>
 
        Backported from mainline

diff --git a/gcc/testsuite/gcc.dg/pr51821.c b/gcc/testsuite/gcc.dg/pr51821.c
new file mode 100644 (file)
index 0000000..e7ba409
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr51821.c
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
+extern void abort (void);
+
+unsigned int  __attribute__((noinline))
+test (int shift_size)
+{
+  unsigned long long res = ~0;
+
+  return res << shift_size;
+}
+
+int
+main ()
+{
+  int dst = 32;
+
+  if (test (dst) != 0)
+    abort ();
+
+  return 0;
+}