struct rtl83xx_soc_info soc_info;
const void *fdt;
-static char soc_name[16];
-static char rtl83xx_system_type[48];
+static char rtl_soc_name[16];
+static char rtl_system_type[48];
#ifdef CONFIG_MIPS_MT_SMP
extern const struct plat_smp_ops vsmp_smp_ops;
-static struct plat_smp_ops rtlops;
+static struct plat_smp_ops rtl_smp_ops;
static void rtlsmp_init_secondary(void)
{
if (!cpu_has_mipsmt)
return 1;
- rtlops = vsmp_smp_ops;
- rtlops.init_secondary = rtlsmp_init_secondary;
- rtlops.smp_finish = rtlsmp_finish;
- register_smp_ops(&rtlops);
+ rtl_smp_ops = vsmp_smp_ops;
+ rtl_smp_ops.init_secondary = rtlsmp_init_secondary;
+ rtl_smp_ops.smp_finish = rtlsmp_finish;
+ register_smp_ops(&rtl_smp_ops);
return 0;
}
const char *get_system_type(void)
{
- return rtl83xx_system_type;
+ return rtl_system_type;
}
static void __init rtl838x_read_details(u32 model)
if (val > 0 && val <= 26)
suffix = 'A' + (val - 1);
- snprintf(soc_name, sizeof(soc_name), "RTL%04X%c",
+ snprintf(rtl_soc_name, sizeof(rtl_soc_name), "RTL%04X%c",
soc_info.id, suffix);
- soc_info.name = soc_name;
+ soc_info.name = rtl_soc_name;
}
-static void __init rtl83xx_set_system_type(void)
+static void __init set_system_type(void)
{
char revision = '?';
char *es = "";
if (soc_info.testchip)
es = " ES";
- snprintf(rtl83xx_system_type, sizeof(rtl83xx_system_type),
+ snprintf(rtl_system_type, sizeof(rtl_system_type),
"Realtek %s%s rev %c (%04X)",
soc_info.name, es, revision, soc_info.cpu);
}
u32 model = read_model();
parse_model(model);
- rtl83xx_set_system_type();
+ set_system_type();
pr_info("SoC Type: %s\n", get_system_type());