arm64: dts: rockchip: fix pinmux of UART5 for PX30 Ringneck on Haikou

commit 55de171bba1b8c0e3dd18b800955ac4b46a63d4b upstream.

UART5 uses GPIO0_B5 as UART RTS but muxed in its GPIO function,
therefore UART5 must request this pin to be muxed in that function, so
let's do that.

Fixes: 5963d97aa780 ("arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikou")
Cc: stable@vger.kernel.org
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250225-ringneck-dtbos-v3-2-853a9a6dd597@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
index 73a549b26659f7eb864e0b0950f1913cb27592d3..3d5e81a0afdc579f29d9201bd40cf83e8e2a9b87 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
@@ -194,6 +194,13 @@
                          <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
                };
        };
+
+       uart {
+               uart5_rts_pin: uart5-rts-pin {
+                       rockchip,pins =
+                         <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
 };
 
 &pwm0 {
@@ -228,6 +235,9 @@
 };
 
 &uart5 {
+       /* Add pinmux for rts-gpios (uart5_rts_pin) */
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart5_xfer &uart5_rts_pin>;
        rts-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
        status = "okay";
 };