arm64: dts: airoha: en7581: Add Clock Controller node

Add Clock Controller node for EN7581 SoC to correctly expose supported
clock for any user in the SoC.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250105150328.15172-1-ansuelsmth@gmail.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
[ upstream commit: 7693017580e9be839fa5f27130bb6500f3597595 ]

diff --git a/dts/upstream/src/arm64/airoha/en7581.dtsi b/dts/upstream/src/arm64/airoha/en7581.dtsi
index 55eb1762fb11364877695960f5a2d3e42caf8611..f584409e72cdb218cb219130966677f7bc8df5e4 100644 (file)
--- a/dts/upstream/src/arm64/airoha/en7581.dtsi
+++ b/dts/upstream/src/arm64/airoha/en7581.dtsi
@@ -2,6 +2,7 @@
 
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/en7523-clk.h>
 
 / {
        interrupt-parent = <&gic>;
@@ -142,6 +143,13 @@
                        interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
                };
 
+               scuclk: clock-controller@1fa20000 {
+                       compatible = "airoha,en7581-scu";
+                       reg = <0x0 0x1fb00000 0x0 0x970>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+               };
+
                uart1: serial@1fbf0000 {
                        compatible = "ns16550";
                        reg = <0x0 0x1fbf0000 0x0 0x30>;