sse4-common.h: make changes to make test_PMAXSD usable for 32bit

Modify DO_imm_r_r macro called by test_PMAXSD to use xmm7 register
when testing on 32bit.

diff --git a/none/tests/amd64/sse4-64.c b/none/tests/amd64/sse4-64.c
index d795dfde5142ed24d155ddb5925fe530975102f4..7048f96f6706e44c7bfcf8bcf6004fd4e40d791c 100644 (file)
--- a/none/tests/amd64/sse4-64.c
+++ b/none/tests/amd64/sse4-64.c
@@ -1503,17 +1503,6 @@ void test_PMAXSB ( void )
    }
 }
 
-void test_PMAXSD ( void )
-{
-   V128 src, dst;
-   Int i;
-   for (i = 0; i < 10; i++) {
-      randV128(&src);
-      randV128(&dst);
-      DO_mandr_r("pmaxsd", src, dst);
-   }
-}
-
 void test_PMAXUD ( void )
 {
    V128 src, dst;

diff --git a/none/tests/sse4-common.h b/none/tests/sse4-common.h
index 80ffb4e7711d3db62f0fb50117c5d8993ab53b65..1e08218b5e4ce0ec86cd583a578c690287c8cf70 100644 (file)
--- a/none/tests/sse4-common.h
+++ b/none/tests/sse4-common.h
@@ -159,16 +159,23 @@ static inline double mkNegNan ( void ) { return -mkPosNan(); }
 
 /* Macros for testing XMM register to register and memory to register operations */
 
+/* Use xmm7 for 32-bit x86, xmm11 for amd64 (xmm8-15 don't exist in 32-bit mode) */
+#ifdef __x86_64__
+#define XMMREG_DST "xmm11"
+#else
+#define XMMREG_DST "xmm7"
+#endif
+
 #define DO_imm_r_r(_opname, _imm, _src, _dst)  \
    {  \
       V128 _tmp;  \
       __asm__ __volatile__(  \
          "movupd (%0), %%xmm2"    "\n\t"  \
-         "movupd (%1), %%xmm11"   "\n\t"  \
-         _opname " $" #_imm ", %%xmm2, %%xmm11"  "\n\t"  \
-         "movupd %%xmm11, (%2)" "\n"  \
+         "movupd (%1), %%" XMMREG_DST   "\n\t"  \
+         _opname " $" #_imm ", %%xmm2, %%" XMMREG_DST  "\n\t"  \
+         "movupd %%" XMMREG_DST ", (%2)" "\n"  \
          : /*out*/ : /*in*/ "r"(&(_src)), "r"(&(_dst)), "r"(&(_tmp))  \
-         : "cc", "memory", "xmm2", "xmm11"                            \
+         : "cc", "memory", "xmm2", XMMREG_DST                            \
       );  \
       RRArgs rra;  \
       memcpy(&rra.arg1, &(_src), sizeof(V128));  \
@@ -183,11 +190,11 @@ static inline double mkNegNan ( void ) { return -mkPosNan(); }
       V128* _srcM = memalign16(sizeof(V128));  \
       memcpy(_srcM, &(_src), sizeof(V128));  \
       __asm__ __volatile__(  \
-         "movupd (%1), %%xmm11"   "\n\t"  \
-         _opname " $" #_imm ", (%0), %%xmm11"  "\n\t"  \
-         "movupd %%xmm11, (%2)" "\n"  \
+         "movupd (%1), %%" XMMREG_DST   "\n\t"  \
+         _opname " $" #_imm ", (%0), %%" XMMREG_DST  "\n\t"  \
+         "movupd %%" XMMREG_DST ", (%2)" "\n"  \
          : /*out*/ : /*in*/ "r"(_srcM), "r"(&(_dst)), "r"(&(_tmp))  \
-         : "cc", "memory", "xmm11"  \
+         : "cc", "memory", XMMREG_DST  \
       );  \
       RRArgs rra;  \
       memcpy(&rra.arg1, &(_src), sizeof(V128));  \
@@ -206,11 +213,11 @@ static inline double mkNegNan ( void ) { return -mkPosNan(); }
       V128 _tmp;  \
       __asm__ __volatile__(  \
          "movupd (%0), %%xmm2"    "\n\t"  \
-         "movupd (%1), %%xmm11"   "\n\t"  \
-         _opname " %%xmm2, %%xmm11"  "\n\t"  \
-         "movupd %%xmm11, (%2)" "\n"  \
+         "movupd (%1), %%" XMMREG_DST   "\n\t"  \
+         _opname " %%xmm2, %%" XMMREG_DST  "\n\t"  \
+         "movupd %%" XMMREG_DST ", (%2)" "\n"  \
          : /*out*/ : /*in*/ "r"(&(_src)), "r"(&(_dst)), "r"(&(_tmp))  \
-         : "cc", "memory", "xmm2", "xmm11"  \
+         : "cc", "memory", "xmm2", XMMREG_DST  \
       );  \
       RRArgs rra;  \
       memcpy(&rra.arg1, &(_src), sizeof(V128));  \
@@ -225,11 +232,11 @@ static inline double mkNegNan ( void ) { return -mkPosNan(); }
       V128* _srcM = memalign16(sizeof(V128));  \
       memcpy(_srcM, &(_src), sizeof(V128));  \
       __asm__ __volatile__(  \
-         "movupd (%1), %%xmm11"   "\n\t"  \
-         _opname " (%0), %%xmm11"  "\n\t"  \
-         "movupd %%xmm11, (%2)" "\n"  \
+         "movupd (%1), %%" XMMREG_DST   "\n\t"  \
+         _opname " (%0), %%" XMMREG_DST  "\n\t"  \
+         "movupd %%" XMMREG_DST ", (%2)" "\n"  \
          : /*out*/ : /*in*/ "r"(_srcM), "r"(&(_dst)), "r"(&(_tmp))  \
-         : "cc", "memory", "xmm11"  \
+         : "cc", "memory", XMMREG_DST  \
       );  \
       RRArgs rra;  \
       memcpy(&rra.arg1, &(_src), sizeof(V128));  \
@@ -243,4 +250,17 @@ static inline double mkNegNan ( void ) { return -mkPosNan(); }
       DO_r_r(_opname, _src, _dst) \
       DO_m_r(_opname, _src, _dst)
 
+/* Common test functions */
+
+static inline void test_PMAXSD ( void )
+{
+   V128 src, dst;
+   Int i;
+   for (i = 0; i < 10; i++) {
+      randV128(&src);
+      randV128(&dst);
+      DO_mandr_r("pmaxsd", src, dst);
+   }
+}
+
 #endif /* __SSE4_COMMON_H */

diff --git a/none/tests/x86/sse4-x86.c b/none/tests/x86/sse4-x86.c
index a93a4acd277ff06ffc8b3111604f7f3c9cb9a1d5..7e4189852f67611423f1ddb37a45e63b90716b29 100644 (file)
--- a/none/tests/x86/sse4-x86.c
+++ b/none/tests/x86/sse4-x86.c
@@ -104,6 +104,7 @@ int main(void)
 {
    // ------ SSE 4.1 ------
    test_PINSRD();
+   test_PMAXSD();
 
    return 0;
 }