Try to fold out some of the lousy code generated by the amd64 front

end for 32 bit shifts.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2315

diff --git a/VEX/priv/ir_opt.c b/VEX/priv/ir_opt.c
index 5bf44fd1044e4ea5c85528acc558c5ac1a950209..240d89e7dec6f7969a2d86c27cc435a479f63185 100644 (file)
--- a/VEX/priv/ir_opt.c
+++ b/VEX/priv/ir_opt.c
@@ -4514,6 +4514,33 @@ static IRExpr* fold_IRExpr_Unop ( IROp op, IRExpr* aa )
       /* 32Uto64( 16Uto32( x )) --> 16Uto64(x) */
       if (is_Unop(aa, Iop_16Uto32))
          return IRExpr_Unop(Iop_16Uto64, aa->Iex.Unop.arg);
+      /* 32Uto64(64to32( Shr64( 32Uto64(64to32(x)), sh ))
+                     --> Shr64( 32Uto64(64to32(x)), sh )) */
+      if (is_Unop(aa, Iop_64to32)
+          && is_Binop(aa->Iex.Unop.arg, Iop_Shr64)
+          && is_Unop(aa->Iex.Unop.arg->Iex.Binop.arg1, Iop_32Uto64)
+          && is_Unop(aa->Iex.Unop.arg->Iex.Binop.arg1->Iex.Unop.arg,
+                     Iop_64to32)) {
+         return aa->Iex.Unop.arg;
+      }
+      /*     32Uto64(64to32( Shl64( 32Uto64(64to32(x)), sh ))
+         --> 32Uto64(64to32( Shl64(                x,   sh )) */
+      if (is_Unop(aa, Iop_64to32)
+          && is_Binop(aa->Iex.Unop.arg, Iop_Shl64)
+          && is_Unop(aa->Iex.Unop.arg->Iex.Binop.arg1, Iop_32Uto64)
+          && is_Unop(aa->Iex.Unop.arg->Iex.Binop.arg1->Iex.Unop.arg,
+                     Iop_64to32)) {
+         return
+            IRExpr_Unop(
+               Iop_32Uto64,
+               IRExpr_Unop(
+                  Iop_64to32,
+                  IRExpr_Binop(
+                     Iop_Shl64, 
+                     aa->Iex.Unop.arg->Iex.Binop.arg1->Iex.Unop.arg->Iex.Unop.arg,
+                     aa->Iex.Unop.arg->Iex.Binop.arg2
+            )));
+      }
       break;
 
    case Iop_1Sto32:
@@ -4529,7 +4556,6 @@ static IRExpr* fold_IRExpr_Unop ( IROp op, IRExpr* aa )
       }
       break;
 
-
    default:
       break;
    }