]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: rockchip: enable I2C3 in Haikou carrierboard, not Ringneck DTSI
authorQuentin Schulz <quentin.schulz@cherry.de>
Tue, 18 Feb 2025 11:49:19 +0000 (12:49 +0100)
committerHeiko Stuebner <heiko@sntech.de>
Sat, 22 Feb 2025 23:44:37 +0000 (00:44 +0100)
PX30 Ringneck only exposes I2C3 as LVDS_BLC_CLK/DAT on Q7 golden fingers
but nothing is on that bus on the SoM itself. Therefore, let's enable
the I2C3 bus where it makes sense, in the Haikou carrierboard DTS.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250218-tsd-align-haikou-v1-8-5c44d1dd8658@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi

index e4517f47d519cc08ec9ee705a6f51a740687f6df..16996cc6b8b62fb4f87ab5cff7e86ba751af1794 100644 (file)
 };
 
 &i2c3 {
+       status = "okay";
+
        eeprom@50 {
                reg = <0x50>;
                compatible = "atmel,24c01";
index ae050cc6cd050f730fb8fd7e3971a166d234d408..c166a9e3cc1c30bba3ab9b6a5ce3e1f67566ee8c 100644 (file)
        };
 };
 
-&i2c3 {
-       status = "okay";
-};
-
 &i2s0_8ch {
        rockchip,trcm-sync-tx-only;