Stop trying to represent the bfins instruction with the insv pattern,

because it causes an extra copy when bfins reuses one of its inputs.
	* config/tilegx/tilegx.md (*bfins): Rename to insn_bfins.
	(insn_bfins): Delete.

From-SVN: r190724

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bf81a33d9a36faeb1696012f2b9465e42bb6e433..717df46fa92d5a17f2d092f94f3b59a33b108aa8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-08-27  Walter Lee  <walt@tilera.com>
+       
+       * config/tilegx/tilegx.md (*bfins): Rename to insn_bfins.
+       (insn_bfins): Delete.
+
 2012-08-27  Walter Lee  <walt@tilera.com>
 
        * config/tilegx/sync.md (atomic_compare_and_swap_bare<mode>,

diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md
index 1fb6cdc2dd515b16dde5015da3039c3a6f379446..7a68a2d313bc59c83e028335aa3dd8a610193fb7 100644 (file)
--- a/gcc/config/tilegx/tilegx.md
+++ b/gcc/config/tilegx/tilegx.md
@@ -2627,7 +2627,7 @@
   "bfextu\t%0, %r1, %2, %3"
   [(set_attr "type" "X0")])
 
-(define_insn "*bfins"
+(define_insn "insn_bfins"
   [(set (match_operand:DI 0 "register_operand" "=r")
         (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "0")
                     (match_operand:DI 2 "reg_or_0_operand" "rO")
@@ -2638,36 +2638,6 @@
    "bfins\t%0, %r2, %3, %4"
    [(set_attr "type" "X0")])
 
-(define_expand "insn_bfins"
-  [(set (match_operand:DI 0 "register_operand" "")
-        (unspec:DI [(match_operand:DI 1 "reg_or_0_operand" "")
-                    (match_operand:DI 2 "reg_or_0_operand" "")
-                    (match_operand:DI 3 "u6bit_cint_operand" "")
-                    (match_operand:DI 4 "u6bit_cint_operand" "")]
-                   UNSPEC_INSN_BFINS))]
-  "INTVAL (operands[3]) != 64"
-{
-  HOST_WIDE_INT first = INTVAL (operands[3]);
-  HOST_WIDE_INT last = INTVAL (operands[4]);
-
-  if (last >= first)
-    {
-      /* This is not a wacky wraparound case, so we can express this
-         as a standard insv. */
-      if (operands[0] != operands[1])
-        {
-         operands[2] = make_safe_from (operands[2], operands[0]);
-         emit_move_insn (operands[0], operands[1]);
-       }
-
-      emit_insn (gen_insv (operands[0],
-                          GEN_INT (last - first + 1), operands[3],
-                          operands[2]));
-
-      DONE;
-    }
-})
-
 (define_insn "insn_cmpexch<four_if_si>"
   [(set (match_operand:I48MODE 0 "register_operand" "=r")
         (mem:I48MODE (match_operand 1 "pointer_operand" "rO")))