drm/i915: pass dev_priv explicitly to PIPEFRAME

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPEFRAME register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7e6d1a8d3ae2a42efa3a48884e0e37357e0108c1.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 12913bbdf123c4e2d7d956f064a81ef7fe6a8f9f..aa1cd8b6c5478830dcca3e740629720d03ea8e38 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -103,7 +103,8 @@ u32 i915_get_vblank_counter(struct drm_crtc *crtc)
         * we get a low value that's stable across two reads of the high
         * register.
         */
-       frame = intel_de_read64_2x32(dev_priv, PIPEFRAMEPIXEL(pipe), PIPEFRAME(pipe));
+       frame = intel_de_read64_2x32(dev_priv, PIPEFRAMEPIXEL(pipe),
+                                    PIPEFRAME(dev_priv, pipe));
 
        pixel = frame & PIPE_PIXEL_MASK;
        frame = (frame >> PIPE_FRAME_LOW_SHIFT) & 0xffffff;

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c19d9863db653668e56ffe481f9fbf04dc196fdb..52e4d0b3cd0cff6d4ac62ab6f768ae5b741c7caf 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1797,7 +1797,7 @@
 
 #define TRANSCONF(dev_priv, trans)     _MMIO_PIPE2(dev_priv, (trans), _TRANSACONF)
 #define PIPEDSL(dev_priv, pipe)                _MMIO_PIPE2(dev_priv, pipe, _PIPEADSL)
-#define PIPEFRAME(pipe)                _MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEHIGH)
+#define PIPEFRAME(dev_priv, pipe)              _MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEHIGH)
 #define PIPEFRAMEPIXEL(pipe)   _MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEPIXEL)
 #define PIPESTAT(pipe)         _MMIO_PIPE2(dev_priv, pipe, _PIPEASTAT)