serial: sc16is7xx: rename LCR macros to better reflect usage

There is no reference to CONF_MODE_A or CONF_MODE_B in the manufacturer's
datasheet.

Rename register set configuration macros for the LCR register, to better
show their intended usage to select either the Special register set, or the
Enhanced register set.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Link: https://patch.msgid.link/20251027142957.1032073-2-hugo@hugovil.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index c7435595dce13d6801c1f56ace0bd0dc6c7ca37d..330d95446f1d734460f665d229ab75881f002070 100644 (file)
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -149,10 +149,12 @@
 #define SC16IS7XX_LCR_WORD_LEN_6       (0x01)
 #define SC16IS7XX_LCR_WORD_LEN_7       (0x02)
 #define SC16IS7XX_LCR_WORD_LEN_8       (0x03)
-#define SC16IS7XX_LCR_CONF_MODE_A      SC16IS7XX_LCR_DLAB_BIT /* Special
-                                                               * reg set */
-#define SC16IS7XX_LCR_CONF_MODE_B      0xBF                   /* Enhanced
-                                                               * reg set */
+#define SC16IS7XX_LCR_REG_SET_SPECIAL  SC16IS7XX_LCR_DLAB_BIT /* Special
+                                                               * reg set
+                                                               */
+#define SC16IS7XX_LCR_REG_SET_ENHANCED 0xBF                   /* Enhanced
+                                                               * reg set
+                                                               */
 
 /* MCR register bits */
 #define SC16IS7XX_MCR_DTR_BIT          BIT(0)   /* DTR complement
@@ -442,7 +444,7 @@ static void sc16is7xx_efr_lock(struct uart_port *port)
        one->old_lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG);
 
        /* Enable access to Enhanced register set */
-       sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_CONF_MODE_B);
+       sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_REG_SET_ENHANCED);
 
        /* Disable cache updates when writing to EFR registers */
        regcache_cache_bypass(one->regmap, true);
@@ -598,7 +600,7 @@ static int sc16is7xx_set_baud(struct uart_port *port, int baud)
        /* Backup LCR and access special register set (DLL/DLH) */
        lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG);
        sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
-                            SC16IS7XX_LCR_CONF_MODE_A);
+                            SC16IS7XX_LCR_REG_SET_SPECIAL);
 
        /* Write the new divisor */
        regcache_cache_bypass(one->regmap, true);
@@ -1650,7 +1652,7 @@ int sc16is7xx_probe(struct device *dev, const struct sc16is7xx_devtype *devtype,
 
                /* Enable EFR */
                sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG,
-                                    SC16IS7XX_LCR_CONF_MODE_B);
+                                    SC16IS7XX_LCR_REG_SET_ENHANCED);
 
                regcache_cache_bypass(regmaps[i], true);